NOTE this task will not be started until issue #52 is complete.
Task Outcome
Update our simulation Makefile (and perhaps some support libraries) to allow users to specify either a single test-program to run or a full suite of tests to run.
Background information
The simulation testbench for the RTL requires a compiler/assembler toolchain (or SDK) to translate C/assembler programs into machine code which are then mapped to hexfiles (verilog memh format) for simulation. Currently, we are using the SDK from pulp-platform, and eventually OpenHW may need to support our own.
The testbench we inherited from PULP has the ability to run a suite of assembler programs in a single directory. All the programs in the directory are run. This is useful, but what we will need to have going forward is the ability to be able to run a single assembler program, not every program in the directory.
Location Information
Simulations using the core testbench are run from cv32/sim/core.
Simulations using the UVM testbench are run from cv32/sim/uvmt_cv32.
The task requires updates to Makefiles at both of these locations.
There is also at Makefile at cv32/tests/core, but this will be removed in the future and need not be updated.
Completion Criteria
Ability to run a simulation using a single assembler test or all tests in a directory of assembler sources.
MikeOpenHWGroup
commented
4 years ago
NOTE this task will not be started until issue #52 is complete.
Task Outcome
Update our simulation Makefile (and perhaps some support libraries) to allow users to specify either a single test-program to run or a full suite of tests to run.
Background information
The simulation testbench for the RTL requires a compiler/assembler toolchain (or SDK) to translate C/assembler programs into machine code which are then mapped to hexfiles (verilog memh format) for simulation. Currently, we are using the SDK from pulp-platform, and eventually OpenHW may need to support our own.
The testbench we inherited from PULP has the ability to run a suite of assembler programs in a single directory. All the programs in the directory are run. This is useful, but what we will need to have going forward is the ability to be able to run a single assembler program, not every program in the directory.
Location Information
Simulations using the
coretestbench are run fromcv32/sim/core. Simulations using theUVMtestbench are run fromcv32/sim/uvmt_cv32. The task requires updates to Makefiles at both of these locations. There is also at Makefile atcv32/tests/core, but this will be removed in the future and need not be updated.Completion Criteria
Ability to run a simulation using a single assembler test or all tests in a directory of assembler sources.