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core-v-xif
RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
https://docs.openhwgroup.org/projects/openhw-group-core-v-xif/en
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Improving X_MISA parameter
#167
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christian-herber-nxp
closed
7 months ago
christian-herber-nxp
commented
7 months ago
clarifying what a CPU is expected to do with this parameter
Adjusting the range of the paramter
old range was 32:0
range according to RV spec is MXLEN-1:0
new range is 25:0, as this is where the Extensions field is