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openhwgroup / core-v-xif

RISC-V eXtension interface that provides a generalized framework suitable to implement custom coprocessors and ISA extensions
https://docs.openhwgroup.org/projects/openhw-group-core-v-xif/en
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Fixed performance issue with register pairs #78

Closed christian-herber-nxp closed 9 months ago

christian-herber-nxp commented 9 months ago

When using register pairs, the validity of source operands was signalled per register pair only. Thus, instructions that only use a single register for an operand have to wait for the entire pair to be valid and might be stalled unnecessarily.

Fixes #76

christian-herber-nxp commented 9 months ago

@davideschiavone any outstanding remarks?