Updated hardware loop instruction encodings

[MaryBennett]

==Related Issues== Issues #63 & #64

==Commit==

Changed how uimml in cv.starti, cv.endi, and cv.setup was encoded to match the specification. Did the same for uimmS in cv.setupi.

Files Changed:

bfd:

• elfxx-riscv.c: Changed the CORE-V hardware loop relocations to rightshift 2.

gas/config:

• tc-riscv.c: Changed encoding of uimmL and uimmS in hardware loop instructions.

gas/testsuite/gas/riscv:

• cv-hwlp-endi.d: Updated tests.
• cv-hwlp-endi.s: Likewise.
• cv-hwlp-fail-operand-01.l: Likewise.
• cv-hwlp-fail-operand-01.s: Likewise.
• cv-hwlp-fail-operand-02.l: Likewise.
• cv-hwlp-fail-operand-03.l: Likewise.
• cv-hwlp-fail-operand-03.s: Likewise.
• cv-hwlp-fail-operand-04.l: Likewise.
• cv-hwlp-fail-operand-10.s: Likewise.
• cv-hwlp-march-rv32i-xcorev.d: Likewise.
• cv-hwlp-setup.d: Likewise.
• cv-hwlp-setup.s: Likewise.
• cv-hwlp-setupi.d: Likewise.
• cv-hwlp-setupi.s: Likewise.
• cv-hwlp-starti.d: Likewise.
• cv-hwlp-starti.s: Likewise.

ld/testsuite/ld-riscv-elf:

• cv-hwlp-endi.d: Updated tests.
• cv-hwlp-setup.d: Likewise.
• cv-hwlp-setupi.d: Likewise.
• cv-hwlp-starti.d: Likewise.

opcodes:

• riscv-dis.c: Changed how the relocation is printed.

==Results==

===GAS===	Category	Previous	With commit	Delta
Expected passes	1270	1270	-
Unexpected failures	-	-	-
Unexpected successes	-	-	-
Expected failures	23	23	-
Unresolved testcases	-	-	-
Unsupported tests	9	9	-

===LD===	Category	Previous	With commit	Delta
Expected passes	584	588	+4
Unexpected failures	18	14	-4
Unexpected successes	-	-	-
Expected failures	18	18	-
Unresolved testcases	-	-	-
Unsupported tests	219	219	-

The additional four passes in LD are due to:

• opcode encoding had not been updated to cv32e40pv2

[jeremybennett]

@MaryBennett - what are the remaining 14 unexpected failures?

[MaryBennett]

Two of the failures are caused by cv.bneimm and cv.beqimm. These are fixed in PR #72.

[MaryBennett]

Here are the new results:	Category	Previous	With commit	Delta
Expected passes	427	431	+4
Unexpected failures	6	2	-4
Unexpected successes	-	-	-
Expected failures	16	16	-
Unresolved testcases	3	3	-
Untested testcases	20	20	-
Unsupported tests	200	200	-