openhwgroup / corev-gcc

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Exclude CORE-V memory tests for compressed code generation. #82

Closed jeremybennett closed 1 year ago

jeremybennett commented 1 year ago
The generation of CORE-V memory instructions in these tests only
occurs for performance optimization levels (01, 02, 03), but not
for unoptimized code (00, 0g) or for compressed optimization (0s,
Oz).

gcc/testsuite/

* gcc.target/riscv/cv-mem-lb-compile-1.c: Exclude running at -O0, -Os, -Og as well as -O0.
* gcc.target/riscv/cv-mem-lb-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-lbu-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-lbu-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-lh-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-lh-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-lhu-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-lhu-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-lw-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-lw-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-sb-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-sb-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-sh-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-sh-compile-2.c: Likewise.
* gcc.target/riscv/cv-mem-sw-compile-1.c: Likewise.
* gcc.target/riscv/cv-mem-sw-compile-2.c: Likewise.
MaryBennett commented 1 year ago

Looks good.