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openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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Align the code to the lowRISC style-guide #252

Open davideschiavone opened 4 years ago

davideschiavone commented 4 years ago

The code should be restructerd following the lowRISC style-guides defined at

https://github.com/lowRISC/style-guides

Smattacus commented 4 years ago

Is this still open? I'd like to start getting involved, and refactoring code is a way I can learn what's going on internally.

davideschiavone commented 4 years ago

Hello @Smattacus !

Yes that would be amazing! Would you like to set a call up with me and @rickoco ?

It would take less than 30 minutes.

Thanks Davide

Smattacus commented 4 years ago

Great! What calling software do you use? Wednesday and on is best for me. I am in USA PST.

MikeOpenHWGroup commented 4 months ago

This was not resolved for v1.0.0 and we are now at v1.8.0. As we approach v2.0.0 we should consider whether to:

  1. Close it.
  2. Waive it for v1.8.0 (and by extension v2.0.0).

Making existing code conform to a new coding style is a nice-to-have, not a must-have feature, so I recommend option 2.

pascalgouedo commented 4 months ago

+1 for waive it.

davideschiavone commented 4 months ago

waive