In v1.3.0 User Manual section 13.2.2, Hardware Loops lpstart and lpend registers 2 LSBs can be written.
And it is implemented like that in the RTL design.
But as described in section 12.1, the addresses contained in those registers must always be 32-b aligned.
So those registers are useless and can be hardwired to 0.
pascalgouedo
commented
1 year ago
In v1.3.0 User Manual section 13.2.2, Hardware Loops lpstart and lpend registers 2 LSBs can be written. And it is implemented like that in the RTL design.
But as described in section 12.1, the addresses contained in those registers must always be 32-b aligned. So those registers are useless and can be hardwired to 0.