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openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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How can I build this core? #955

Closed Unlimitosu closed 7 months ago

Unlimitosu commented 8 months ago

Hi, I'm trying to build this core, but I have no idea with it.

Initially, I tried to build it with Vivado in Windows 11, but the entire area and resource usage is extremely small than expected.

So I want to build it is Ubuntu, but I really don't have any idea.

Can anyone help me? Is there a guideline or documents for building?

MikeOpenHWGroup commented 7 months ago

Hi @Unlimitosu, thanks for your interest in the CV32E40P. We do no not provide direct support for our IP, but there is some good documentation I can point you to:

  1. The Core Integration chapter of the User Manual.
  2. For simulation there is an example testbench.
  3. There is an example synthesis contraint file here.
Unlimitosu commented 7 months ago

Thanks a lot! I will watch them.