openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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Impossible to cover case default #960

Closed pascalgouedo closed 2 months ago

pascalgouedo commented 3 months ago

Issue Description

When a case description is complete and there is an additional default just to respect good practice/coding rules, it is reported as a uncovered by coverage tools and should be analysed and waived again and again. Replacing one of the case description value by default allows to definitively solve the problem.

In cv32e40p_decoder.sv, this occurs 3 times on lines 1911, 2096 and 2129.

Component

Component:RTL

Steps to Reproduce

RTL code review

pascalgouedo commented 3 months ago

Corrected with PR #961