openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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Added new apu_busy_o at cv32e40p_core level for v1 lec and fpu latency parameters for v2 lec. #974

Closed pascalgouedo closed 7 months ago