openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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Ensure Makefiles support both SNPS VCS and Siemens Questa for the above #982

Open DBees opened 2 months ago

MikeOpenHWGroup commented 2 months ago

Hi @DBees. What is this about? The issue title references "the above", and in the context of a GitHub Issue, that doesn't make much sense. Is this a copy-paste from the CVE2 task spreadsheet?