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openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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RISC-V ISA Formal Verification files for SiemensEDA OneSpin tool. #993

Closed pascalgouedo closed 5 months ago

pascalgouedo commented 6 months ago

Hi Mike,

I am pretty sure this encrypted tcl file is using a OneSpin private key like it is done for automatically generated assertions SystemVerilog file. And anyway I think nothing here can be used in any other tool.

For Solderpad license I should maybe ask (again) to SiemensEDA to be sure.

Only restrictions I remember was about FormalVerifPlan excel file, not on those tool setup files.

MikeOpenHWGroup commented 6 months ago

For Solderpad license I should maybe ask (again) to SiemensEDA to be sure.

Thanks. This is important to OpenHW for obvious reasons.