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openhwgroup / cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest
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Adding formal rule for coverage holes on controller #997

Closed YoannPruvost closed 3 months ago

YoannPruvost commented 3 months ago

This PR is a follow up on my previous work on code coverage holes This one covers the controller