openhwgroup / cv32e40s

4 stage, in-order, secure RISC-V core based on the CV32E40P
https://docs.openhwgroup.org/projects/cv32e40s-user-manual/en/latest/
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Parameter cleanup. Part of fix for https://github.com/openhwgroup/cv3… #431

Closed silabs-oivind closed 1 year ago

silabs-oivind commented 1 year ago

…2e40x/issues/676