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cv32e40s
4 stage, in-order, secure RISC-V core based on the CV32E40P
https://docs.openhwgroup.org/projects/cv32e40s-user-manual/en/latest/
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Removed cv32e40s_align_check
#460
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silabs-oysteink
closed
1 year ago
silabs-oysteink
commented
1 year ago
SEC clean
SEC clean