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openhwgroup / cv32e41p

4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
https://docs.openhwgroup.org/projects/cv32e41p-user-manual/
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4) Fix lint warnings #20

Closed abukharmeh closed 2 years ago

davideschiavone commented 2 years ago

it is ok for me (once you merge the conflict files) - are the changes logically equivalent to cv32e40p?

abukharmeh commented 2 years ago

Yes they should be. In fact, these are the lint warnings reported by Jasper when I was doing equivalence checks. I will resolve the merge conflicts tomorrow.

abukharmeh commented 2 years ago

@davideschiavone Done

davideschiavone commented 2 years ago

LGTM