openhwgroup / cv32e41p

4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
https://docs.openhwgroup.org/projects/cv32e41p-user-manual/
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Change PULP_ZFINX ISA to the RISC-V ZFINX ISA #3

Open davideschiavone opened 3 years ago

davideschiavone commented 3 years ago

we should move from the custom PULP ZFINX ISA to the RISC-V ZFINX ISA

This implies:

Task assigned to @tariqkurd-repo