openhwgroup / cv32e41p

4 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
https://docs.openhwgroup.org/projects/cv32e41p-user-manual/
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marchid is not correct #7

Closed abukharmeh closed 2 years ago

abukharmeh commented 3 years ago

Hi ,

I am starting to add various Zce instructions, and I am wondering what marchid should be ?

I noticed that marchids are allocated in riscv-isa-manual, and people do PRs to add new entries and get a new marchid allocated, should I do that now, or is it generally allocated after new cores are fully developed ?

Kind regards, Ibrahim