openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
Other
2.21k stars 672 forks source link

[TASK] MMU Architectural DV Plan Execution #1464

Open fatimasaleem opened 12 months ago

fatimasaleem commented 12 months ago

Is there an existing CVA6 task for this?

Task Description

Add a comprehensive set of self-checking assembly tests to execute the SV32 testplan for the architectural verification of SV32 MMU of the step 1 CVA6 configuration (CV32A6X).

Required Changes

Current Status

PR is created

Risks

No response

Prerequisites

No response

KPI (KEY Performance Indicators)

No response

Description of Done

Merged PR

Associated PRs

https://github.com/openhwgroup/cva6/pull/1376

JeanRochCoulon commented 9 months ago

@fatimasaleem , I wonder whether this verification is based on self-testing tests or based on UVM methodology ?

@MikeOpenHWGroup Can I ask you to review this task. If you think the task is completed, can you comment the task and switch the status from "done" to "finished".

MikeOpenHWGroup commented 9 months ago

I am re-opening this Issue as @JeanRochCoulon has requested a review of the MMU DV Plan.