Closed Siris-Li closed 7 months ago
@jquevremont Do you know somebody who can help ?
@Siris-Limx, before any deep diving, have you looked at https://github.com/ThalesGroup/cva6-eclipse-demo?
@jquevremont Yes, I know the basic knowledge about baremetal debugging. The log from OpenOCD tells me that the CPU never raise dmstatus.allhalted
high, thus giving the error failed to halt
.
I don't change anything but the top module ariane_xilinx.sv
, just commenting some peripherals such as SPI and Ethernet. I wonder if changing the peripherals led to this failed to halt
error?
We have only published such support on Genesys 2 board. Unfortunately, we do not have enough resources to address other settings. Contributions are welcome to extend the ecosystem.
@Siris-Limx I have the same OpenOCD error. I ported CVA6 to the ZCU102 board, and then tried to debug the design via JTAG. Calling OpenOCD gives me the following error:
$ openocd -f ariane.cfg
Open On-Chip Debugger 0.12.0+dev-g61c6b08-dirty (2024-01-05-16:37)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : clock speed 1000 kHz
Info : TAP riscv.cpu does not have valid IDCODE (idcode=0xfffffffe)
Info : [riscv.cpu] datacount=2 progbufsize=12
Error: [riscv.cpu] Unable to halt. dmcontrol=0x80000001, dmstatus=0x00000c82
Error: [riscv.cpu] Fatal: Hart 0 failed to halt during examine
Warn : target riscv.cpu examination failed
Info : starting gdb server for riscv.cpu on 3333
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet
Error: [riscv.cpu] Unsupported DTM version: -1
Error: [riscv.cpu] Could not identify target type.
The verbose log shows the same errors as yours as well. Were you able to solve the problem? My design also has no SPI and Ethernet peripherals. I'm not sure if that's the cause of the issue.
@Siris-Limx I have the same OpenOCD error.
@yadu-kr Hello! The problem I met was due to the bootrom.
To be exact, the default bootrom contain some code that the CPU could not recognize, such as the initialization of SPI.
This will cause the unable to halt
error.
To identify the problem, I ran the post-synthesis simulation in Vivado and found out that the CPU will just stall at some position in the bootrom. I changed the bootrom to a simply infinite loop, and the OpenOCD could work well.
I hope my experience will help you. :)
@Siris-Limx Thank you for the quick response!
I changed the bootrom to a simply infinite loop, and the OpenOCD could work well.
I'm assuming you changed the bootrom inside the fpga/src/bootrom
folder, which contains the zero stage bootloader (or the FSBL?). Would it be possible for you to share the changes you made or your new bootrom files? Would be really helpful.
Would it be possible for you to share the changes you made or your new bootrom files? Would be really helpful.
Oh, the bootrom in fpga/src/bootrom
is a little bit complicated because it compiles not only startup.S
, but also many C files like main.c
, uart.c
, etc. The bootrom I use lies in corev_apu/bootrom
, it's very simple and you can take a look at the Makefile to see how it is compiled.
I'm not convenient to reach my code now, I will share the changes I made as soon as possible (may be one day long). But I think you can change it on your own before I share it. :)
@yadu-kr Hello! Following code is my bootrom.S
in corev_apu/bootrom
.
.section .text.start, "ax", @progbits
.globl _start
_start:
# bootrom.sv need to be functional in 64 and 32 bits,
# li s0, DRAM_BASE creates instructions not compatible with both
# versions. That's why we have replaced it by li and slli instructions
# to generates code compatible with both versions.
li s0, 1
slli s0, s0, 31
jr _start
# csrr a0, mhartid
# la a1, _dtb
# jr s0
.section .text.hang, "ax", @progbits
.globl _hang
_hang:
csrr a0, mhartid
la a1, _dtb
1:
wfi
j 1b
.section .rodata.dtb, "a", @progbits
.globl _dtb
.align 5, 0
_dtb:
.incbin "ariane.dtb"
Here, I just change to last sentence in _start
section to jr _start
, which means jump to the start of this section.
Obviously, this is an infinite loop.
To generate the corresponding bootrom.sv
, you need to run make
under corev_apu/bootrom
, make sure you run bash verif/sim/setup-env.sh
to set up the environment variables needed by the Makefile.
Is there an existing CVA6 bug for this?
Bug Description
I've transplanted CVA6 APU to a non-genesys2 FPGA, and tried to debug it through OpenOCD. However, I cannot launch OpenOCD to connect to my FPGA. Here is my terminal output:
This is the detail when I tried to run
openocd
with-d3
debug level.OpenOCD debug output
``` Debug: 6 1 log.c:237 handle_log_output_command(): set log_output to "openocd_halt.log" Debug: 7 1 options.c:233 add_default_dirs(): bindir=/usr/local/bin Debug: 8 1 options.c:234 add_default_dirs(): pkgdatadir=/usr/local/share/openocd Debug: 9 1 options.c:235 add_default_dirs(): exepath=/usr/local/bin Debug: 10 1 options.c:236 add_default_dirs(): bin2data=../share/openocd Debug: 11 1 configuration.c:33 add_script_search_dir(): adding /root/.config/openocd Debug: 12 1 configuration.c:33 add_script_search_dir(): adding /root/.openocd Debug: 13 1 configuration.c:33 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site Debug: 14 1 configuration.c:33 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts Debug: 15 1 command.c:154 script_debug(): command - ocd_find ariane.cfg Debug: 16 1 configuration.c:88 find_file(): found ariane.cfg Debug: 17 1 command.c:154 script_debug(): command - adapter speed 1000 Debug: 18 1 adapter.c:249 adapter_config_khz(): handle adapter khz Debug: 19 1 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 20 1 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 21 1 command.c:154 script_debug(): command - adapter list Debug: 22 1 command.c:154 script_debug(): command - adapter driver ftdi Debug: 23 1 command.c:154 script_debug(): command - ftdi vid_pid 0x0403 0x6014 Debug: 24 1 command.c:154 script_debug(): command - ftdi channel 0 Debug: 25 1 command.c:154 script_debug(): command - ftdi layout_init 0x0018 0x001b Debug: 26 1 command.c:154 script_debug(): command - ftdi layout_signal nTRST -ndata 0x0010 Debug: 27 1 command.c:154 script_debug(): command - transport select Info : 28 1 transport.c:267 handle_transport_select(): auto-selecting first available session transport "jtag". To override use 'transport select