Updated tb_wb_dcache and adapted it for 32-bits

openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

https://docs.openhwgroup.org/projects/cva6-user-manual/

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Updated tb_wb_dcache and adapted it for 32-bits #2151

Closed cyprienh closed 4 months ago

cyprienh commented 4 months ago

This PR provides an updated testbench for the WB cache which works for 64-bits and 32-bits (PR for 32-bits WB cache coming soon). The tests run with the current 64-bits version of the WB cache and allowed me to catch the bug from PR #2142.