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openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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When NrPMPEntries == 8, set 2 upper PMPCfg and 8 upper CfgAddress as read-only CSRs #2234

Closed JeanRochCoulon closed 3 weeks ago

JeanRochCoulon commented 3 weeks ago

Related logic is not removed, this will be addressed in following PR

github-actions[bot] commented 3 weeks ago

:x: failed run, report available here.

Moschn commented 3 weeks ago

Just FYI: the PMPCFG/PMPADDR write logic is here. I believe the current state should already achieve what you want to achieve in this PR. Maybe your change will save some area, but I assume a good compiler will optimize this away anyways.

Also the proposed changes are hardcoded for NR_PMP_ENTRIES=8. What happens if one uses 12 PMP entries? Or 7?

github-actions[bot] commented 3 weeks ago

:x: failed run, report available here.

JeanRochCoulon commented 3 weeks ago

THnaks you @Moschn for your feedback. I set the PR in draft and will fine tune the PR.

JeanRochCoulon commented 3 weeks ago

ok, after deeper analysis of the code, the RTL seems functional as it is. @AyoubJalali , what is your feedback, have you seen some misfunctionality on PMPCFG or PMPADDR ?

AyoubJalali commented 3 weeks ago

ok, after deeper analysis of the code, the RTL seems functional as it is. @AyoubJalali , what is your feedback, have you seen some misfunctionality on PMPCFG or PMPADDR ?

I'll check this !!