openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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feat: extend cva6_hpdcache_if_adapter (support for hpdcache_icache as well) #2238

Closed takeshiho0531 closed 2 weeks ago

takeshiho0531 commented 3 weeks ago

IMG_75979DCD40C8-1

github-actions[bot] commented 3 weeks ago

:x: failed run, report available here.

yanicasa commented 3 weeks ago

I am currently working on the redefinition of the interfaces between the cache and the front end and the LSU, I think this is a subject related to yours, I have a dev branch open in the CVA6 repo where I simplified the icache kill mechanism and moved the fetch address translation request from icache to frontend.

For my part I am looking for someone who could adapt the caches to these new interfaces that I am developing in the front end and the LSU

Branch: https://github.com/openhwgroup/cva6/tree/feature/interconnect

@cfuguet @JeanRochCoulon