search

openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
Other
2.23k stars 675 forks source link

[Xcelium flow] Fix initialization of memory array for simulation #2259

Closed CoralieAllioux closed 3 months ago

CoralieAllioux commented 3 months ago

This PR aims at fixing sram initialization in tc_sram memory model. Initialization of SRAM in tc_sram.sv model is exceeding tool limit at runtime. Simple fix is to use a for loop instead of assigning the whole signal.

It contributes to task https://github.com/openhwgroup/cva6/issues/1829

github-actions[bot] commented 3 months ago

:heavy_check_mark: successful run, report available here.