[BUG] Design doc generation: custom CSRs are missing in the CV32A65X documentation

openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

https://docs.openhwgroup.org/projects/cva6-user-manual/

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[BUG] Design doc generation: custom CSRs are missing in the CV32A65X documentation #2268

Open zchamski opened 1 week ago

zchamski commented 1 week ago

Is there an existing CVA6 bug for this?

[X] I have searched the existing bug issues

Bug Description

The riscv-config specification of CV32A65X contains the description of CSRs ICACHE and DCACHE, but these registers are not rendered in the design documentation based on riscv-config.

The corresponding riscv-config output is located in file config/riscv-config/cv32a65x/generated/custom_gen.yaml.

JeanRochCoulon commented 1 week ago

@AbdessamiiOukalrazqou, I suppose this task could be completed by you ? I assign it to you, feel free to re-assign if needed

AbdessamiiOukalrazqou commented 1 week ago

@JeanRochCoulon ,@zchamski it is under treatment