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openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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[BUG] LSU overflow (unused vaddr bits unequal) triggers ld/st access fault instead of page fault #2272

Closed michael-platzer closed 1 week ago

michael-platzer commented 1 week ago

Is there an existing CVA6 bug for this?

Bug Description

The LSU triggers an ld/st access fault in case of an overflow (i.e., when the unused upper bits of a virtual address are not equal).

https://github.com/openhwgroup/cva6/blob/89568b0c10f93b2040bb4d6b5c55d2ef6fee87db/core/load_store_unit.sv#L601-L605

However, the RISC-V privileged spec requires a page fault instead.

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JeanRochCoulon commented 1 week ago

Thanks for the issue and fix !