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openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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[BUG] : Decoder Bitmanip instructions #2276

Closed AyoubJalali closed 1 week ago

AyoubJalali commented 1 week ago

Is there an existing CVA6 bug for this?

Bug Description

Hello, this is a RTL bug in the cva6 Decoder, the problem appears in this code image

there's 2 problems here :

  1. there's no condition for [24:23] bits, according to the spec these should be always 0.
  2. there's no else for illegal instruction if we didn't enter any if.

so if we try using a directed test to execute an ctz instruction with [24-23] != 0 , the RTL will execute it, that's the wrong behavior !!