Add debug_req UVM agent to UVM TB

[xiaoweish]

1. Add interrupt and debug_req uvm agents to UVM TB for further interrupt and debug_req development.
2. Use +gen_irq_noise runtime option to enable IRQ generation.

[JeanRochCoulon]

Thanks @xiaoweish, this PR announces great verification improvements for debug feature.

@AnouarZajni would you have time to review this PR, to valid the way to connect new agent in CVA6 UVM env ?

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[xiaoweish]

Hi @AnouarZajni, Could you please spare some time to review this PR?

[AnouarZajni]

Hi @xiaoweish, Actually @AyoubJalali has developed a more complete interrupt agent, see PR #2309. Please let him/me know if anything is missing from this agent for your further verification

Regards, Anouar

[xiaoweish]

Thanks @AnouarZajni ! I removed interrupt agent from this PR and make this change much more atomic, which only contains debug agent.

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[AnouarZajni]

Thank you @xiaoweish, Debug agent integration looks good to me. However, the uvma_debug agent components are not yet implemented (no signals monitoring, no driver implementation, no sequences) and I don't see any usage of the agent into the pushed code! So no need to have dead code in Tb unless you push including updated uvma_debug agent + sequences + tests

[xiaoweish]

Hi @AnouarZajni In verif/tb/uvmt/uvmt_cva6.flist, debug agent is included by -f ${DV_UVMA_DEBUG_PATH}/uvma_debug_pkg.flist, i.e., it use below debug agent from core-v-verif submodule. https://github.com/openhwgroup/core-v-verif/tree/master/lib/uvm_agents/uvma_debug

I looked into this agent, and maybe its driver/monitor/seq are not fully implemented. However, we can use it like 40s/40x to trigger debug_req signal in the virtual peripheral as below. of course, it just use the debug interface actually. https://github.com/openhwgroup/core-v-verif/blob/master/cv32e40s/env/uvme/vseq/uvme_cv32e40s_vp_debug_control_seq.sv#L63

Any suggestion?

[AnouarZajni]

@xiaoweish, as you highlighted uma_debug agent is a skeleton agent with an interface with nothing implemented in it. I can see that in 40s/40x they are just assigning interface signal in sequence which is not aligned with UVM methodology.

My suggestion is to fully implement functions in uvma_debug agent like done by @AyoubJalali in PR2309 for interrupts.

[xiaoweish]

Since we're talking about a classic/fully-fledged UVM agent, I'll close this PR as I have not implemented such one for now.

By the way, my intention is to work on this task: https://github.com/openhwgroup/cva6/issues/1364

I'll push other PR for this task.

[AnouarZajni]

Thanks @xiaoweish for the clarification. You can simply move the vif assignement from sequence to uvma_debug driver and then reuse all the integration you have already done

[xiaoweish]

Thanks @AnouarZajni for your suggestion. Let me think about how to implement the debug control virtual peripheral and legacy debug_test in cva6's UVM testbench.