refac: cva6 icache fsm hit

openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

https://docs.openhwgroup.org/projects/cva6-user-manual/

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refac: cva6 icache fsm hit #2312

Closed takeshiho0531 closed 2 months ago

takeshiho0531 commented 3 months ago

Aligned the description of obi_valid in the READ and READ_BIS states within cva6_icache (feature/interconnect branch)
Modifications related to this comment mentioned in PR #2288

github-actions[bot] commented 3 months ago

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yanicasa commented 3 months ago

@takeshiho0531 I work on this topic too, I edit my comment on your PR #2288

takeshiho0531 commented 3 months ago

@yanicasa I have checked your updated comments. I personally found it easier to read when hit and kill_req cases are separated, so I aligned the code with the separated style.

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yanicasa commented 3 months ago

@takeshiho0531 I agree with you, I have the same fix in one my pending commits on my side, it should be available soon :)

takeshiho0531 commented 2 months ago

@yanicasa So, should I close this PR....??