openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
https://docs.openhwgroup.org/projects/cva6-user-manual/
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Porting CVA6 to VCU118: SPI Signal Issues #2413

Closed mrbilandi closed 14 hours ago

mrbilandi commented 1 month ago

I am going to port CVA6 to the VCU118 board. I have synthesized the FPGA code for the VCU118 and used the PMOD micro SD card adapter from Digilent. However, I observed that Linux gets stuck at a certain point. After troubleshooting with an oscilloscope, I noticed that the clock signal of the SPI interface only goes up to 1.2V, whereas it should reach 3.3V, which is the operating voltage of the SD card. 20240726_133953

After checking the schematic, I saw that Xilinx used a level translator to convert the FPGA voltage bank from 1.2V to 3.3V and vice versa. The reference voltage of this translator was connected to 1.2V, but the voltage of the FPGA's bank that this translator was connected to was 1.8V. I thought this mismatch might be the cause, so I changed the bank voltage to 1.2V using a software called "VCU118 SCUI" provided by Xilinx. However, the clock signal remained the same.

After researching this issue, I discovered that several people have reported the same problem with the PMOD port on the VCU118 when used for the SD card. The issue is that this translator is open-drain and requires pull-up resistors at its output. The adapter we bought has these pull-up resistors, but their value is too high (20 kOhms), causing the clock signal to rise very slowly. Therefore, we need to replace these resistors with lower-value ones. There is a recommendation online to use resistors around 470 ohms.

So overall, I think I should do two things: firstly, decrease the frequency of the SPI interface to see if the rise time of the clock signal improves. secondly, if the first step doesn't work, replace these pull-up resistors with lower-value ones.

My question is: How can I decrease the frequency of the SPI? I have increased the "Frequency Ratio" in the xlnx_axi_quad_spi module, but I'm not sure if I also need to adjust the frequency in the boot-up firmware.

Thanks

dassheladiya commented 1 month ago

Hi, I am also currently attempting to port CVA6 to the VCU118 board. To achieve this, I have implemented the changes mentioned in this commit: https://github.com/jctullos/cva6/commit/7c290d1b22cd57645555440f88dbba1295b46ed5 , which were suggested in a previous issue. I have successfully generated the bit-stream; however, when I run Linux, the console remains blank. Could you please confirm if these changes are sufficient for porting CVA6? Any guidance would be greatly appreciated.

Thank you.

mrbilandi commented 1 month ago

Hi dassheladiya,

I actually took a different approach. I built the FPGA code of CVA6 for the Genesys2 board and then modified it in Vivado (GUI) for the VCU118 instead of modifying the makefile and TCL scripts. I hope I can do that later. For now, there are two USB-UART ports. Are you sure you selected the correct one in the terminal?

I used these pins in the .xdc file which is connected to port2 of USB-UART:

set_property -dict {PACKAGE_PIN AW25 IOSTANDARD LVCMOS18} [get_ports rx]; set_property -dict {PACKAGE_PIN BB21 IOSTANDARD LVCMOS18} [get_ports tx];

Now I can see that the boot ROM works but gets stuck when it tries to get data from the SD card, as you can see below.

Hello World! init SPI status: 0x0000000000000025 status: 0x0000000000000025 SPI initialized! initializing SD... could not initialize sd... exiting

mrbilandi commented 1 month ago

In the bootloader, there are some "nop" instructions after SPI transmit. If we increase the frequency ratio, we need to increase these delays implemented using "nop" instructions. After increasing these delays, the bootloader can communicate with the SD card and read from it, but it is too slow!

Now the problem is that it gets stuck at the following step:

OpenSBI v0.9


/ \ / __ _ _ __ (___ _) ' \ / \ '_ \ ___ \ _ < __ _) __/ ____) _) _ ____/ ./ _ _ _ _____/ __/___
_

Platform Name : ARIANE RISC-V Platform Features : medeleg Platform HART Count : 1 Platform IPI Device : aclint-mswi Platform Timer Device : aclint-mtimer @ 1000000Hz Platform Console Device : uart8250 Platform HSM Device : --- Platform Reboot Device : --- Platform Shutdown Device : --- Firmware Base : 0x80000000 Firmware Size : 220 KB Runtime SBI Version : 0.3

Domain0 Name : root Domain0 Boot HART : 0 Domain0 HARTs : 0* Domain0 Region00 : 0x0000000002008000-0x000000000200bfff (I) Domain0 Region01 : 0x0000000002000000-0x0000000002007fff (I) Domain0 Region02 : 0x0000000080000000-0x000000008003ffff () Domain0 Region03 : 0x0000000000000000-0xffffffffffffffff (R,W,X) Domain0 Next Address : 0x0000000080200000 Domain0 Next Arg1 : 0x0000000082200000 Domain0 Next Mode : S-mode Domain0 SysReset : yes

Boot HART ID : 0 Boot HART Domain : root Boot HART ISA : rv64imafdcbsu Boot HART Features : scounteren,mcounteren,mcountinhibit Boot HART PMP Count : 16 Boot HART PMP Granularity : 8 Boot HART PMP Address Bits: 54 Boot HART MHPM Count : 6 Boot HART MIDELEG : 0x0000000000000222 Boot HART MEDELEG : 0x000000000000b109

U-Boot 2021.07-rc4-g920075ecfa-dirty (Jul 05 2024 - 10:36:43 +0200)

CPU: rv64imafdc DRAM: 1 GiB MMC: xps-spi@20000000:mmc@0: 0 Loading Environment from nowhere... OK In: uart@10000000 Out: uart@10000000 Err: uart@10000000 Net: LOWRISC-ETH: 30000000, phyaddr 0 eth0: lowrisc-eth@30000000 Hit any key to stop autoboot: 0 Wrong Image Format for bootm command ERROR: can't get kernel image! =>

mrbilandi commented 1 month ago

I added some printf statements in U-Boot to see what is going on, and it turns out that when it wants to read data with a length of more than 256 bytes, the next byte is lost and consequently the CRC fails. I changed the maximum block size (MMC_MAX_BLOCK_LEN) to 256. I saw that the retrieved data is correct, but the calculated CRC fetched from MMC is not the same (mmc_spi_readdata: data CRC error, expected 5384 got 988f).

I got stuck at this step and would really appreciate it if anyone can help.

mrbilandi commented 1 month ago

Okay, I got it. Since I decreased the SPI frequency, it is necessary to add a delay in the SPI driver for U-Boot to be able to read data properly from the SD card, just like I did for the bootrom. After adding this delay, I now have Linux booting up successfully without changing the pull-up resistors. However, it's slow; it takes around 5 minutes to boot Linux!

dassheladiya commented 1 month ago

Hi @mrbilandi , Congratulations on successfully running Linux. I have selected the correct UART port, but my screen remains blank. Is your work open source? If so, could you kindly share the changes in a patch file, if possible?

github-actions[bot] commented 6 days ago

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This issue seems inactive. Need more help? Feel free to update us. If there are no updates within the next few days, we'll go ahead and close this issue. 😊