Open hhhsiang opened 1 month ago
Hello @hhhsiang The synthesis is run on cv32a65x, no experience on 64 bit configuration. Do you experience the same type of error on cv32a65x configuration ?
Hi @JeanRochCoulon , as far as i know, the cv64a6 was synthesized in the past, so there are scripts in Makefile under the cva6/pd/synth
directory. Because in the old commit cv64a6 is the synthesis target in the makefile, I'm confused why did you say no experience on 64 bit configuration?
I also tyr to synthesize cv32a65x, with make -C pd/synth cva6_synth FOUNDRY_PATH=/your/techno/basepath/ TECH_NAME=yourTechnoName TARGET_LIBRARY_FILES="yourLib1.db\ yourLib2.db" PERIOD=10 NAND2_AREA=650 TARGET=cv64a6_imafdc_sv39 ADDITIONAL_SEARCH_PATH="others/libs/paths/one\ others/libs/paths/two"
, but there is error occurred like the following:
It seems that $(SYNTH_FLOW_NAME)
parameter is not set properly.
Yes, you are right, I personally setup maybe 3 years ago the scripts to synthetize 32 and 64 bits configurations. But we currently use different scripts to do it. That is why these scripts are no more used.
Understood. Could you share the script you use for synthesizing the 64-bit configuration? I find it challenging to create a script that successfully synthesizes the CV64A6 core, given the numerous dependent files that need to be included and preprocessed.
Unfortunately, physical implementation depends on techno which we cannot disclose it.
Is there an existing CVA6 bug for this?
Bug Description
When I synthesize cv64a6 core with
cv64a6_imafdc_sv39_config_pkg.sv
with Design Compiler version-2023.12, there are lots of error occurred, and all of them like the following:It's all about "Constant expression too complex. (ELAB-937)". I check the systemverilog code where the error happened. All of the errors seem to be caused by the parameter of cva6 config pkg.
When the parameters of cva6_config_pkg are used to determine whether a circuit or a module will be instantiated, the "Constant expression too complex. (ELAB-937)" error occurred. Lots of modules are not synthesized. How can I fixed it?
Any advice or suggestions would be greatly appreciated. Thanks in advance!