[BUG] CSR Reads to 0x7C1 do not flagged as Illegal Instruction

openhwgroup / cve2

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

https://docs.openhwgroup.org/projects/cve2-user-manual/en/latest/

Apache License 2.0

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[BUG] CSR Reads to 0x7C1 do not flagged as Illegal Instruction #179

Open emgens opened 11 months ago

emgens commented 11 months ago

Bug Description

The cv32e20 core returns a value a of zero and does not flag an illegal instruction when CSR address 0x7C1 is accessed. This was a custom CSR in the IBEX implementation, but the function it controlled (secure seed) is not implemented. The ability to read this address should be removed.

MikeOpenHWGroup commented 11 months ago

Hi @joecircello, I assigned this issue to you because I am not sure of the best individual to assign it to and I'm hoping you do. :wink:

joecircello commented 11 months ago

As per the discussion in the 2023-12-19 CV32E20 weekly project meeting, I have reassigned this issue to Szymon.