openhwgroup / cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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Removing old code (not in use anymore) #1099

Closed Huda-10xe closed 1 week ago

Huda-10xe commented 1 week ago

This was previously used when rvvi coverage was separate from ISACOV, now that it has been combined this is not needed anymore.