WALLY-mtvec-01 mismatch

[davidharrishmc]

After changing the CLINT initialization in a recent PR, WALLY-mtvec-01 is failing. The machine timer interrupt is not occurring.

wsim rv32gc wally32priv
#   Error on test rv32i_m/privilege/src/WALLY-mtvec-01.S result           1: adr = 80006114 sim (D$) 0000000b signature = 80000007
# ** Note: $stop    : /home/harris/cvw/testbench/testbench.sv(957)

The code that should set up the interrupt is at

800001a8 <cause_m_time_interrupt>:
800001a8:   03000e13            li  t3,48
800001ac:   000e0693            mv  a3,t3
800001b0:   02004eb7            lui t4,0x2004
800001b4:   0200cf37            lui t5,0x200c
800001b8:   ff8f0f13            addi    t5,t5,-8 # 200bff8 <MMODE_SIG+0x200bff5>
800001bc:   000f2383            lw  t2,0(t5)
800001c0:   004f2f83            lw  t6,4(t5)
800001c4:   01c38e33            add t3,t2,t3
800001c8:   01c3e663            bltu    t2,t3,800001d4 <nowrap_m>
800001cc:   001f8f93            addi    t6,t6,1
800001d0:   01fea223            sw  t6,4(t4) # 2004004 <MMODE_SIG+0x2004001>

Lockstep works. Check with:

wsim rv32gc tests/riscof/work/wally-riscv-arch-test/rv32i_m/privilege/src/WALLY-lrsc-01.S/ref/ref.elf --sim questa --lockstepverbose

[davidharrishmc]

The nowrap_m skips over copying the most significant word. Trying a fix to RV32. If this works, need to update WALLY-TEST_LIB-64.h as well.

[davidharrishmc]

This made some progress, but now is timing out at WALLY-TRAP-u-01.S.