search

openhwgroup / cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
Other
272 stars 198 forks source link

Revert "Add ExceptionM to fcov" #1119

Closed davidharrishmc closed 2 days ago

davidharrishmc commented 2 days ago

Reverts openhwgroup/cvw#1118