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openhwgroup / cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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Build & Test Infrastructure setup #876

Closed eroom1966 closed 3 weeks ago

eroom1966 commented 1 month ago

@jordancarlin I decided to setup a new issue thread, the previous conversation was unrelated to the original post from @davidharrishmc

I am further along, I think I have everything installed as indicated, trying to build the tests by running make -C sim

Produces a lot of ERROR messages and ultimately fails

    INFO | ****** RISCOF: RISC-V Architectural Test Framework 1.25.3 *******
    INFO | using riscv_isac version : 0.18.0
    INFO | using riscv_config version : 3.18.3
    INFO | Reading configuration from: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/config32.ini
    INFO | Preparing Models
    INFO | Input-ISA file
    INFO | ISACheck: Loading input file: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/spike/spike_rv32gc_isa.yaml
    INFO | ISACheck: Load Schema /usr/local/lib/python3.10/dist-packages/riscv_config/schemas/schema_isa.yaml
    INFO | ISACheck: Processing Hart:0
    INFO | ISACheck: Initiating Validation for Hart:0
    INFO | ISACheck: No errors for Hart:0
    INFO | ISACheck:  Updating fields node for each CSR in Hart:0
    INFO | ISACheck: Dumping out Normalized Checked YAML: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/spike_rv32gc_isa_checked.yaml
    INFO | Input-Platform file
    INFO | Loading input file: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/spike/spike_platform.yaml
    INFO | Load Schema /usr/local/lib/python3.10/dist-packages/riscv_config/schemas/schema_platform.yaml
    INFO | Initiating Validation
    INFO | No Syntax errors in Input Platform Yaml. :)
    INFO | Dumping out Normalized Checked YAML: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/spike_platform_checked.yaml
    INFO | Generating database for suite: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite
    INFO | Database File Generated: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/database.yaml
    INFO | Env path set to/home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/env
    INFO | Running Build for DUT
    INFO | Running Build for Reference
   ERROR | Error in test: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv64i_m/Zicond/src/czero.eqz-01.S
Test Selected without the relevant extensions being available on DUT.
   ERROR | Error in test: /home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv64i_m/Zicond/src/czero.nez-01.S
Test Selected without the relevant extensions being available on DUT.
    INFO | Selecting Tests.
    INFO | Running Tests on DUT.
   ERROR | make[2]: Entering directory '/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work'
make[2]: Leaving directory '/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work'
   ERROR | /home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv32i_m/I/src/jalr-01.S: Assembler messages:
/home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv32i_m/I/src/jalr-01.S:72: Error: illegal operands `la x0,5b'
terminate called after throwing an instance of 'std::runtime_error'
  what():  could not open my.elf; searched paths:
    . (current directory)
    /home/shared_scratch/moore/RISCV_CVW/riscv64-unknown-elf/bin/ (based on configured --prefix and --with-target)
make[2]: *** [/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/Makefile.DUT-spike:1561: TARGET389] Error 255
make[2]: *** Waiting for unfinished jobs....
    INFO | Running Tests on Reference Model.
   ERROR | make[2]: Entering directory '/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work'
make[2]: Leaving directory '/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work'
   ERROR | /home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv32i_m/I/src/jalr-01.S: Assembler messages:
/home/moore/git/eroom1966/openhwgroup/cvw/cvw/addins/riscv-arch-test/riscv-test-suite/rv32i_m/I/src/jalr-01.S:72: Error: illegal operands `la x0,5b'
riscv64-unknown-elf-objdump: 'ref.elf': No such file
make[2]: *** [/home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/Makefile.Reference-sail_c_simulator:1561: TARGET389] Error 1
make[2]: *** Waiting for unfinished jobs....
    INFO | Initiating signature checking.
   ERROR | Signature file : /home/moore/git/eroom1966/openhwgroup/cvw/cvw/tests/riscof/riscof_work/rv32i_m/I/src/jalr-01.S/dut/DUT-spike.signature does not exist
make[1]: *** [Makefile:28: arch32] Error 1
jordancarlin commented 1 month ago

@eroom1966 That seems like a known bug with an old version of riscv-arch-test (https://github.com/riscv-non-isa/riscv-arch-test/issues/444, https://github.com/riscv-non-isa/riscv-arch-test/pull/446). Try running git submodule update from the cvw directory to get the version currently compatible with Wally.

eroom1966 commented 3 weeks ago

closing this for now as resolved