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openhwgroup / cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
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Remove old scripts/files #979

Closed jordancarlin closed 1 month ago

jordancarlin commented 1 month ago

I started removing old scripts and files in PR #978. These are additional files that can likely be removed or need to be updated, but I'm not sure about all of them.

davidharrishmc commented 1 month ago

Here’s ones I can comment on:

On Sep 30, 2024, at 9:47 PM, Jordan Carlin @.***> wrote:

I started removing old scripts and files in PR #978 https://github.com/openhwgroup/cvw/pull/978. These are additional files that can likely be removed or need to be updated, but I'm not sure about all of them.

sim/ bp-results Should this be here? Seems like references to a bunch of log files. @rosethompson https://github.com/rosethompson buildrootBugFinder.py Not currently working. Update or remove? Remove

bpred-sim.py Not currently working. Update or remove? I think this is part of the bencharking chapter and we need to get it fixed.

xcelium Not compatible with wsim, not tested regularly. Should this be removed? We don’t have the license at HMC. It was an effort to set up, and I’d prefer to keep it. Maybe a README that is isn’t presently being used.

FPBuild.txt Move relevant parts to tests/fp/README.md and then remove Good

questa/fpga-wave.do Is this used anywhere? Seems like it can be removed. @rosethompson https://github.com/rosethompson tests/ custom Many of these are not run. Are they all still needed or should they be pruned down? Any that are retained should probably be part of regression. studies/ testgen All of the scripts depend on imperas-riscv-tests, which is not in the repo anymore. Should these be removed? Sure

fpga/ generator/bootmem.txt Is this still needed? Isn't the current version generated by the zsbl Makefile? sim Are these all still used? dvtestplan.md and docs/testpan.md are redundant and should be combined gitflow.txt This should either be updated to align with the book (https vs ssh) or removed and just rely on the new user setup in the README and textbook — Reply to this email directly, view it on GitHub https://github.com/openhwgroup/cvw/issues/979, or unsubscribe https://github.com/notifications/unsubscribe-auth/AR4AA36DFFYJ646Z3UO3KMLZZISNNAVCNFSM6AAAAABPEW72UKVHI2DSMVQWIX3LMV43ASLTON2WKOZSGU2TQMJWHE3TQMY. You are receiving this because you are subscribed to this thread.

rosethompson commented 1 month ago

bp-results This directory is necessary for generating the branch predictor sweeps. It's used by the post processing scripts to know which configuration was run. There is probably a better way to do this now that we have derived configs.

buildrootBugFinder.py This was part of the old buildroot testbench and should be removed.

bpred-sim.py This is no longer used. We can remove.

questa/fpga-wave.do I use this to debug the fpga simulation.

fpga/generator/bootmem.txt can remove

fpga/sim can remove

jordancarlin commented 1 month ago

Removed many of these with #983. The ones not yet checked off are the ones I'm still unsure about.

rosethompson commented 1 month ago

I need to go through the tests/custom directory. I used these to help debug Wally in the early stages of development. Some are still useful when debugging issues with the branch predictor and bringing up the FPGA. Most of these can be removed or moved to a different directory. I'll make a new issue to describe the required changes and then you can check this one off this issue.

jordancarlin commented 1 month ago

Great. So that just leaves the DV plans (@davidharrishmc you're probably best suited to update/combine these) and the gitflow.txt document (currently this describes a different flow from the textbook and README).

davidharrishmc commented 1 month ago

Addressed the last two issues with PR #998. I think this can be closed.