openhwgroup / programs

Documentation for the OpenHW Group's set of CORE-V RISC-V cores
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CORE_V_MCU high level design specs #642

Closed cst-rameez closed 7 months ago

cst-rameez commented 9 months ago

Adding high level design specs for the IPs which have insufficient information in core_v_mcu user manual https://docs.openhwgroup.org/projects/core-v-mcu/

Following are CORE-V-MCU IP blocks whose documents are updated: APB Advanced Timer APB SoC Controller APB PLL Interface APB_GPIO APB Timer ABP I2C Slave APB Event Control UDMA CAMERA Interface UDMA SD Card Interface

cst-rameez commented 9 months ago

@MikeOpenHWGroup, I would like to add you as the reviewer here.

DBees commented 9 months ago

Hi @cst-rameez thank you so much for this work. Actually however the correct place to vector these documentation updates would be on the https://github.com/openhwgroup/core-v-mcu/tree/master/docs repo where the documentation files are written in .rst Suggest that we setup a quick chat to chart next steps

PaoloS02 commented 7 months ago

Any updates on this?

MikeOpenHWGroup commented 7 months ago

! Completely forgot about this one - thanks for the gentle prod @PaoloS02.

These updates have been contributed to the CORE-V-MCU repository and are now integrated into the User Manual. I forgot to close this one. (Will do so now.)