openpowerwtf
commented
3 years ago Those diagrams aren't very informative, so it depends what the logic says 😵
My interpretation of the manual is that med-pri MAY issue before the timeout (because there aren't any eligible hi-pri threads), but lo-pri ONLY issues when timeout. I guess that's why they are showing 'Valids'; but they never show any changes. 2-2 seems to differ from 2-4, since when the timeout occurs in 2-2, all the delayed threads then issue. But in 2-4, only one of two issue (if that's correct, then I would expect T3 to issue in the next cycle off the chart, when timeout reaches 3 again). I guess either way might be acceptable, but 2-2 seems more reasonable since the expected delay is a small additive delta from the timeout, depending on non-hi-pri thread count, rather than a multiplicative one.
More investigation is needed...
According to the A2_BGQ manual, the selection logic for the issue logic is a simple round-robin scheme with three levels of priority to allow software more flexibility. As for the medium priority, the manual mentioned: Medium priority instructions only issue when no high-priority instruction is available. The same time-out counter eventually promotes the medium-priority instruction to high-priority to prevent starvation. But I didn't find the medium counter in iuq_fxu_issue.vhdl. So how could it issue? Besides, the manual gave an example of round-robin logic when selecting a thread to issue on Page 81(figure 2-4).
In my opinion, thread 2 and thread 3 are both increased to high priority after 3 cycles. So I think thread 3 should be issued after thread 2 was issued rather than thread1. Why?
Many thanks!