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cache coherency #27

Closed gaobo04 closed 3 years ago

gaobo04 commented 3 years ago

Hi Guys,

Without changing the code of a2 core，is it possible to realize cache coherency based on bus-snooping protocol？or directory-based protocol is the only choice？

Many thanks.

openpowerwtf commented 3 years ago

Yes, you need a bus interface (typically with L2 cache) that implements the required operations between one or more A2L2 interfaces (cores) and an external bus.