openpowerwtf
commented
4 years ago Glad you got through the build! Yes, you are correct. It is very similar to the a2i board design. Since there isn't a DDR interface yet, it is self-contained and the on-board memories are used as the RAM. There has been some discussion in the issues there about boot/testing.
You should read the 'initialization' section in the A2I user's manual, since the A2O manual is not a completed doc. There is also an A2I Run Video which shows it being programmed and running on the FPGA (but not all the details of building the memory loads, yet).
Are you simulating, or actually running on FPGA? Basically, the first thing that needs to be done is load memory with code. I put some sample boot code in a2-boot. When I can get them cleaned up, I will post some scripts as examples of converting the asm output (and gcc) to tcl for loading the memory. There are some tcl files in rel/fpga, one of which defines a waxi proc for writing AXI through the JTAG interface. So to create a memory load script, you repeatedly call waxi to write code/data. At that point, you can release 'threadstop' and the core will begin its boot sequence.
There is no good debugging ability yet, except for the ILA and printing through the kernel to memory. The SCOM interface needs to be implemented to provide serial access to the core internals (also described in the A2I manual). Then, code/logic can be created to talk to the core as an in-circuit emulator. A JTAG console that the core could talk to would be useful too.
So that is a short list of things to do 🤣 We'd like to get some community help, especially if we can create tools and methodologies to support microwatt, a2i, AND a2o.
zhanghaojia123456
Hi buddies,
I have synthesized and implemented the a2o on XIlinx vu3p FPGA according the steps in tutorial video. Noticed that here are only two pins used for clock, how to do the test and debug and how to use the debug port?
Thanks Jerry