Closed pxs7 closed 4 years ago
No plans to convert vhdl files to verilog, but sounds like a good project for you! Submit a pull request when you get something working.
I do plan to converge the A2I and A2O versions of a2l2_axi into one version that works for both.
thanks for your jobs in advance.
it seems that verilog and vhdl src will not be convenient using simulator vcs. verilog vision of vhdl module will make it more easily to run. will you have plan to issue verilog vision