openrisc / mor1kx

mor1kx - an OpenRISC 1000 processor IP core
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back to back multiply, mtspr and multiply. #113

Open JaewonHur opened 4 years ago

JaewonHur commented 4 years ago

When I input multiply, mtspr, multiply instructions sequentially, like this,

  b08e1111  l.muli  r4, r14, 0x1111
  c011f416  l.mtspr r17, r30, 0xf416
  b2160001  l.muli  r16, r22, 0x0001

value in r30 is written to r22 due to the mtspr. and next l.muli instruction uses r22's value in multiplication.

However, next l.muli instruction mistakenly brings old value of r22 because the write back of first l.muli instruction occupies register write port when mtspr should write. Register read-write bypass can fix this situation but I saw ENABLE_BYPASS parameters in mor1kx_rf_cappuccino.v is set to 0. Are there any reason for it?

The full input instructions are as follow.

  18000000  l.movhi r0, 0x0000
  a8200001  l.ori   r1, r0, 0x0001
  c0000811  l.mtspr r0, r1, 0x0811
  abc00000      l.ori   r30, r0, 0x0000
  aac00000      l.ori   r22, r0, 0x0000
  a8800000      l.ori   r4, r0, 0x0000
  a9c00000      l.ori   r14, r0, 0x0000
  aa200000      l.ori   r17, r0, 0x0000
  aa000000      l.ori   r16, r0, 0x0000
  afde0001      l.ori   r30, r30, 0x0001
  aed60002  l.xori  r22, r22, 0x0002
  b08e1111  l.muli  r4, r14, 0x1111
  c011f416  l.mtspr r17, r30, 0xf416
  b2160001  l.muli  r16, r22, 0x0001
  15000000  l.nop   0x0
  15000000  l.nop   0x0