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openrisc / orpsoc-cores

Core description files for FuseSoC
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wb_ack_o missing in wb_to_avalon_bridge for BURST_SUPPORT = 0 #108

Open AakaFosfor opened 7 years ago

AakaFosfor commented 7 years ago

The core wb_to_avalon_bridge doesn't work when the burst support is not selected - there is no assignment for the wb_ack_o signal.

olofk commented 7 years ago

Hi,

Just wanted to let you know that I've seen the issue, but unfortunately I don't know enough about that core to give you an answer right away, and I haven't had time to look into it either

AakaFosfor commented 7 years ago

Hi, thanks for letting me know. No direct problem for me, I have finally used another core (simplified version I found my colleague already did for the same situation I wanted to used it in). So the issue is just FYI. Theoretically, WB-Avalon crossing should be quite easy (so the patch), but I didn't work with Avalon before, so I don't dare to propose a correction.

skristiansson commented 7 years ago

I'm not sure I understand, AFAICT 'wb_ack_o' is assigned at https://github.com/openrisc/orpsoc-cores/blob/master/cores/wb_avalon_bridge/verilog/wb_to_avalon_bridge.v#L231 when BURST_SUPPORT == 0. What am I missing?

AakaFosfor commented 7 years ago

You are right, thank you for pointing it out. I missed "generate-else" at line 214. So the red X in my simulation had to be caused by something else... So, sorry for this issue, you can close it.