olofk
commented
7 years ago The thing is that verilator changed how the class hierarchy is being set up. I'm not sure exactly how to solve that. From what I've heard, there is a switch that you can use to get the old behaviour, but I haven't looked that up.
The easiest way is to change all references from top->v to top->orpsoc_top in tb.cpp. I have done that locally for mor1kx-generic, but that breaks simulations with older versions of verilator, so I haven't pushed those changes yet
I can not get 'or1200-generic' to work with Verilator after an update. If complains about: ‘class Vorpsoc_top’ has no member named ‘v’
Keep in mind that the lines of code may be different from what you have in the repository, as I made some changes to the file.
INFO: Building verilator executable: /home/ricardo/test_vscale/build/or1200-generic/src/or1200-generic/bench/verilator/tb.cpp: In function ‘int main(int, char, char)’: /home/ricardo/test_vscale/build/or1200-generic/src/or1200-generic/bench/verilator/tb.cpp:92:29: error: ‘class Vorpsoc_top’ has no member named ‘v’ new VerilatorTbUtils(top->v->mem->ram0->mem); ^ /home/ricardo/test_vscale/build/or1200-generic/src/or1200-generic/bench/verilator/tb.cpp:119:15: error: ‘class Vorpsoc_top’ has no member named ‘v’ insn = top->v->or1200_top0->or1200_cpu->or1200_ctrl->wb_insn; ^ /home/ricardo/test_vscale/build/or1200-generic/src/or1200-generic/bench/verilator/tb.cpp:120:16: error: ‘class Vorpsoc_top’ has no member named ‘v’ ex_pc = top->v->or1200_top0->or1200_cpu->or1200_except->ex_pc; ^ make: [tb.o] Error 1 make: Waiting for unfinished jobs.... ERROR: Failed to build simulation model ERROR: "make -f Vorpsoc_top.mk -j 16 Vorpsoc_top" exited with an error code. ERROR: See stderr for details.