cores: add mt46v16m16p DDR memory model

openrisc / orpsoc-cores

Core description files for FuseSoC

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Closed fjullien closed 10 years ago

fjullien commented 10 years ago

Signed-off-by: Franck Jullien franck.jullien@gmail.com

olofk commented 10 years ago

Other than the above comment everything looks good to me. Feel free to apply

fjullien commented 10 years ago

You're right. I'm still not that used to verilog syntax :) I'll remove this patch.