Add support for Avalon, AXI4 and AXI4-Lite type busses

openrisc / orpsoc-cores

Core description files for FuseSoC

124 stars 79 forks source link

Add support for Avalon, AXI4 and AXI4-Lite type busses #74

Closed bluecmd closed 9 years ago

bluecmd commented 9 years ago

This commit introduces convertion between a foreign bus architecture and Wishbone. By specifying "bustype=axi4" or "bustype=axi4-lite" on either a slave or a master the interconnect will embed convertion cores and change the output wires to be those of AXI4 / AXI4-Lite.

This is compatible with the "datawidth" directive.

bluecmd commented 9 years ago

Hi @skristiansson and @olofk - it would be great if you could review this pull request, thanks!

bluecmd commented 9 years ago

Done!

olofk commented 9 years ago

Great job! It's merged now. Thanks