Closed basilhussain closed 10 months ago
also there is no GPIOx_CFGHR register mentioned in
"The locked configuration refers to the
configuration registers GPIOx_CFGLR and
GPIOx_CFGHR."
it's not clear if it locks level or just direction.
Thanks for your suggestion.we will fix it .
Thanks for your suggestion.we will fix it .
But does that include port level too AND direction too?
Please refer to the latest manual.
In the EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h header, the GPIO_LCKK definition is incorrect for CH32V003 hardware. It is defined as being in bit 16, but it is actually in bit 8. Also, it thus follows that LCK8 through LCK15 do not exist.
I propose that the definitions for GPIO_LCK8 through GPIO_LCK15 are removed, and GPIO_LCKK is modified as follows: