Closed mrx23dot closed 10 months ago
also MPP:3 in mstatus
TIM1_CH3CVR is 16bit in datasheet, but defined as __IO uint32_t CH3CVR;
"Set the STAT bit of FLASH_CTLR register to '1' to initiate a fast page erase (64 bytes) action"
But there is no STAT in FLASH_CTLR, only FTER
But there is no STAT in FLASH_CTLR, only FTER
This is a typo. It is referring to the STRT bit.
Is everything fixed in the new datasheet? What's the version of the new datasheet?
wrong POR register values: On handle_reset RCC->CFGR0 is 32 not 0 as stated in datasheet!
This means SYSCLK divided by 3 on startup for PLL!
What else is wrong??