ophub / amlogic-s9xxx-armbian

Support for Armbian in Amlogic, Rockchip and Allwinner boxes. Support a311d, s922x, s905x3, s905x2, s912, s905d, s905x, s905w, s905, s905l, rk3588, rk3568, rk3399, rk3328, h6, etc.
GNU General Public License v2.0
5.82k stars 1.87k forks source link

[S912][Kernel Panics] Bullseye - 6.1.7 #975

Closed d5stick closed 1 year ago

d5stick commented 1 year ago

Standard chat template, no routine, no chat. 标准聊天模板,无套路不聊天。

Device Information | 设备信息

Armbian Version | 系统版本

Describe the bug | 问题描述 Describe the problem in detail and attach screenshots if necessary. 详细描述问题,并在必要时附上屏幕截图。 The TV box is experiencing random freezes when the machine is not actively used.
Freezes came after re-installation of the device with the latest version of Armbian.

What i tested with the new builds: Jammy and Bullseye - Freezes Kernels from 5.15 and 6.1.6 - Freezes Replaced power adapters - Freezes

Older build that was working without freezes before i upgraded:

Kernel Panic information: afbeelding

> Settings for the CPU:
> pi@t1000:~$ cpufreq-info
> cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009
> Report errors and bugs to cpufreq@vger.kernel.org, please.
> analyzing CPU 0:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 0 1 2 3
>   CPUs which need to have their frequency coordinated by software: 0 1 2 3
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1.51 GHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz, 1.20 GHz, 1.51 GHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1.51 GHz and 1.51 GHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1.51 GHz (asserted by call to hardware).
> analyzing CPU 1:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 0 1 2 3
>   CPUs which need to have their frequency coordinated by software: 0 1 2 3
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1.51 GHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz, 1.20 GHz, 1.51 GHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1.51 GHz and 1.51 GHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1.51 GHz (asserted by call to hardware).
> analyzing CPU 2:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 0 1 2 3
>   CPUs which need to have their frequency coordinated by software: 0 1 2 3
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1.51 GHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz, 1.20 GHz, 1.51 GHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1.51 GHz and 1.51 GHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1.51 GHz (asserted by call to hardware).
> analyzing CPU 3:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 0 1 2 3
>   CPUs which need to have their frequency coordinated by software: 0 1 2 3
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1.51 GHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz, 1.20 GHz, 1.51 GHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1.51 GHz and 1.51 GHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1.51 GHz (asserted by call to hardware).
> analyzing CPU 4:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 4 5 6 7
>   CPUs which need to have their frequency coordinated by software: 4 5 6 7
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1000 MHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1000 MHz and 1000 MHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1000 MHz (asserted by call to hardware).
> analyzing CPU 5:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 4 5 6 7
>   CPUs which need to have their frequency coordinated by software: 4 5 6 7
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1000 MHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1000 MHz and 1000 MHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1000 MHz (asserted by call to hardware).
> analyzing CPU 6:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 4 5 6 7
>   CPUs which need to have their frequency coordinated by software: 4 5 6 7
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1000 MHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1000 MHz and 1000 MHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1000 MHz (asserted by call to hardware).
> analyzing CPU 7:
>   driver: scpi-cpufreq
>   CPUs which run at the same hardware frequency: 4 5 6 7
>   CPUs which need to have their frequency coordinated by software: 4 5 6 7
>   maximum transition latency: 200 us.
>   hardware limits: 100.0 MHz - 1000 MHz
>   available frequency steps: 100.0 MHz, 250 MHz, 500 MHz, 667 MHz, 1000 MHz
>   available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
>   current policy: frequency should be within 1000 MHz and 1000 MHz.
>                   The governor "performance" may decide which speed to use
>                   within this range.
>   current CPU frequency is 1000 MHz (asserted by call to hardware).
> pi@t1000:~$
> 
> 
ophub commented 1 year ago

https://github.com/ophub/kernel/tree/main/pub/stable

update to 5.4.230

d5stick commented 1 year ago

Tested 5.4.230-ophub using Armbian-update -k 5.4.230. It boots but USB not working. Within 4 minutes after boot it freezes.

I was able to SSH into it and update to kernel 6.1.7 flippy in time and booted. USB working again, no crash yet.

The crashes various from 30 minutes to 1 or 2 days with a freeze as it does not reboots itself.

Any CPU settings you recommend to apply? Changing governor or lower the default speeds?

ophub commented 1 year ago

These kernels are stable for use in other devices. If your device can't find a suitable kernel from 5.4/5.10/5.15/6.1, and everyone panics, then it's not the kernel's problem, it's your device's problem.

Try lowering the frequency of emmc from 200 to 100.

example: https://github.com/unifreq/linux-5.15.y/blob/main/arch/arm64/boot/dts/amlogic/meson-g12a-s905l3a-m401a.dts#L79-L87

d5stick commented 1 year ago

I have created the DTS file to work in the DTB, could you help me where to put in the eMMC value?

Is below modification enough to past in the DTS below?

Updated frequency:

            mmc@74000 {
                compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
                reg = <0x00 0x74000 0x00 0x800>;
                interrupts = <0x00 0xda 0x01>;
                status = "okay";
                clocks = <0x03 0x60 0x03 0x7d 0x03 0x04>;
                clock-names = "core\0clkin0\0clkin1";
                resets = <0x15 0x2e>;
                pinctrl-0 = <0x31 0x32>;
                pinctrl-1 = <0x33>;
                pinctrl-names = "default\0clk-gate";
                bus-width = <0x08>;
                cap-mmc-highspeed;
                max-frequency = <0x5f5e100>;
                non-removable;
                disable-wp;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
                mmc-pwrseq = <0x34>;
                vmmc-supply = <0x35>;
                vqmmc-supply = <0x2e>;
                phandle = <0xa3>;
            };

Original DTB/DTS:

/dts-v1/;

/ {
    interrupt-parent = <0x01>;
    #address-cells = <0x02>;
    #size-cells = <0x02>;
    compatible = "vontar,x92\0amlogic,s912\0amlogic,meson-gxm";
    model = "Vontar X92";

    aliases {
        mmc0 = "/soc/apb@d0000000/mmc@70000";
        mmc1 = "/soc/apb@d0000000/mmc@72000";
        mmc2 = "/soc/apb@d0000000/mmc@74000";
        serial0 = "/soc/bus@c8100000/serial@4c0";
        ethernet0 = "/soc/ethernet@c9410000";
    };

    reserved-memory {
        #address-cells = <0x02>;
        #size-cells = <0x02>;
        ranges;

        hwrom@0 {
            reg = <0x00 0x00 0x00 0x1000000>;
            no-map;
            phandle = <0x48>;
        };

        secmon@10000000 {
            reg = <0x00 0x10000000 0x00 0x200000>;
            no-map;
            phandle = <0x49>;
        };

        secmon@5000000 {
            reg = <0x00 0x5000000 0x00 0x300000>;
            no-map;
            phandle = <0x4a>;
        };

        secmon@5300000 {
            reg = <0x00 0x5300000 0x00 0x2000000>;
            no-map;
            phandle = <0x4b>;
        };

        linux,cma {
            compatible = "shared-dma-pool";
            reusable;
            size = <0x00 0x10000000>;
            alignment = <0x00 0x400000>;
            linux,cma-default;
        };
    };

    chosen {
        #address-cells = <0x02>;
        #size-cells = <0x02>;
        ranges;
        stdout-path = "serial0:115200n8";

        framebuffer-cvbs {
            compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
            amlogic,pipeline = "vpu-cvbs";
            power-domains = <0x02 0x00>;
            status = "disabled";
            phandle = <0x4c>;
        };

        framebuffer-hdmi {
            compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
            amlogic,pipeline = "vpu-hdmi";
            power-domains = <0x02 0x00>;
            status = "disabled";
            clocks = <0x03 0x3f 0x03 0x0c 0x03 0x4d>;
            phandle = <0x4d>;
        };
    };

    cpus {
        #address-cells = <0x02>;
        #size-cells = <0x00>;

        cpu@0 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x00>;
            enable-method = "psci";
            next-level-cache = <0x04>;
            clocks = <0x05 0x00>;
            #cooling-cells = <0x02>;
            capacity-dmips-mhz = <0x400>;
            phandle = <0x06>;
        };

        cpu@1 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x01>;
            enable-method = "psci";
            next-level-cache = <0x04>;
            clocks = <0x05 0x00>;
            #cooling-cells = <0x02>;
            capacity-dmips-mhz = <0x400>;
            phandle = <0x07>;
        };

        cpu@2 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x02>;
            enable-method = "psci";
            next-level-cache = <0x04>;
            clocks = <0x05 0x00>;
            #cooling-cells = <0x02>;
            capacity-dmips-mhz = <0x400>;
            phandle = <0x08>;
        };

        cpu@3 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x03>;
            enable-method = "psci";
            next-level-cache = <0x04>;
            clocks = <0x05 0x00>;
            #cooling-cells = <0x02>;
            capacity-dmips-mhz = <0x400>;
            phandle = <0x09>;
        };

        l2-cache0 {
            compatible = "cache";
            phandle = <0x04>;
        };

        cpu-map {

            cluster0 {

                core0 {
                    cpu = <0x06>;
                };

                core1 {
                    cpu = <0x07>;
                };

                core2 {
                    cpu = <0x08>;
                };

                core3 {
                    cpu = <0x09>;
                };
            };

            cluster1 {

                core0 {
                    cpu = <0x0a>;
                };

                core1 {
                    cpu = <0x0b>;
                };

                core2 {
                    cpu = <0x0c>;
                };

                core3 {
                    cpu = <0x0d>;
                };
            };
        };

        cpu@100 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x100>;
            enable-method = "psci";
            capacity-dmips-mhz = <0x400>;
            next-level-cache = <0x04>;
            clocks = <0x05 0x01>;
            #cooling-cells = <0x02>;
            phandle = <0x0a>;
        };

        cpu@101 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x101>;
            enable-method = "psci";
            capacity-dmips-mhz = <0x400>;
            next-level-cache = <0x04>;
            clocks = <0x05 0x01>;
            #cooling-cells = <0x02>;
            phandle = <0x0b>;
        };

        cpu@102 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x102>;
            enable-method = "psci";
            capacity-dmips-mhz = <0x400>;
            next-level-cache = <0x04>;
            clocks = <0x05 0x01>;
            #cooling-cells = <0x02>;
            phandle = <0x0c>;
        };

        cpu@103 {
            device_type = "cpu";
            compatible = "arm,cortex-a53";
            reg = <0x00 0x103>;
            enable-method = "psci";
            capacity-dmips-mhz = <0x400>;
            next-level-cache = <0x04>;
            clocks = <0x05 0x01>;
            #cooling-cells = <0x02>;
            phandle = <0x0d>;
        };
    };

    thermal-zones {

        cpu-thermal {
            polling-delay-passive = <0x320>;
            polling-delay = <0x3e8>;
            thermal-sensors = <0x0e 0x00>;

            trips {

                cpu-passive {
                    temperature = <0x13880>;
                    hysteresis = <0x7d0>;
                    type = "passive";
                    phandle = <0x0f>;
                };

                cpu-hot {
                    temperature = <0x15f90>;
                    hysteresis = <0x7d0>;
                    type = "hot";
                    phandle = <0x10>;
                };

                cpu-critical {
                    temperature = <0x1adb0>;
                    hysteresis = <0x7d0>;
                    type = "critical";
                    phandle = <0x4e>;
                };
            };

            cooling-maps {
                phandle = <0x4f>;

                map0 {
                    trip = <0x0f>;
                    cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff>;
                };

                map1 {
                    trip = <0x10>;
                    cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff>;
                };
            };
        };
    };

    arm-pmu {
        compatible = "arm,cortex-a53-pmu";
        interrupts = <0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x99 0x04 0x00 0x9a 0x04>;
        interrupt-affinity = <0x06 0x07 0x08 0x09>;
    };

    psci {
        compatible = "arm,psci-0.2";
        method = "smc";
    };

    timer {
        compatible = "arm,armv8-timer";
        interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
    };

    xtal-clk {
        compatible = "fixed-clock";
        clock-frequency = <0x16e3600>;
        clock-output-names = "xtal";
        #clock-cells = <0x00>;
        phandle = <0x17>;
    };

    firmware {

        secure-monitor {
            compatible = "amlogic,meson-gx-sm\0amlogic,meson-gxbb-sm";
            phandle = <0x11>;
        };
    };

    system-suspend {
        compatible = "amlogic,meson-gx-pm";
    };

    efuse {
        compatible = "amlogic,meson-gx-efuse\0amlogic,meson-gxbb-efuse";
        #address-cells = <0x01>;
        #size-cells = <0x01>;
        read-only;
        secure-monitor = <0x11>;
        clocks = <0x03 0x3a>;
        phandle = <0x50>;

        sn@14 {
            reg = <0x14 0x10>;
            phandle = <0x51>;
        };

        eth_mac@34 {
            reg = <0x34 0x10>;
            phandle = <0x52>;
        };

        bid@46 {
            reg = <0x46 0x30>;
            phandle = <0x53>;
        };
    };

    scpi {
        compatible = "amlogic,meson-gxbb-scpi\0arm,scpi-pre-1.0";
        mboxes = <0x12 0x01 0x12 0x02>;
        shmem = <0x13 0x14>;

        clocks {
            compatible = "arm,scpi-clocks";
            phandle = <0x54>;

            scpi_clocks@0 {
                compatible = "arm,scpi-dvfs-clocks";
                #clock-cells = <0x01>;
                clock-indices = <0x00 0x01>;
                clock-output-names = "vbig\0vlittle";
                phandle = <0x05>;
            };
        };

        sensors {
            compatible = "amlogic,meson-gxbb-scpi-sensors\0arm,scpi-sensors";
            #thermal-sensor-cells = <0x01>;
            phandle = <0x0e>;
        };
    };

    soc {
        compatible = "simple-bus";
        #address-cells = <0x02>;
        #size-cells = <0x02>;
        ranges;

        bus@c1100000 {
            compatible = "simple-bus";
            reg = <0x00 0xc1100000 0x00 0x100000>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xc1100000 0x00 0x100000>;
            phandle = <0x55>;

            interrupt-controller@9880 {
                compatible = "amlogic,meson-gpio-intc\0amlogic,meson-gxl-gpio-intc";
                reg = <0x00 0x9880 0x00 0x10>;
                interrupt-controller;
                #interrupt-cells = <0x02>;
                amlogic,channel-interrupts = <0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47>;
                status = "okay";
                phandle = <0x56>;
            };

            reset-controller@4404 {
                compatible = "amlogic,meson-gxbb-reset";
                reg = <0x00 0x4404 0x00 0x9c>;
                #reset-cells = <0x01>;
                phandle = <0x15>;
            };

            audio-controller@5400 {
                compatible = "amlogic,aiu-gxl\0amlogic,aiu";
                #sound-dai-cells = <0x02>;
                sound-name-prefix = "AIU";
                reg = <0x00 0x5400 0x00 0x2ac>;
                interrupts = <0x00 0x30 0x01 0x00 0x32 0x01>;
                interrupt-names = "i2s\0spdif";
                status = "okay";
                clocks = <0x03 0x26 0x03 0x28 0x03 0x50 0x03 0x6b 0x03 0x2c 0x03 0x27 0x03 0x51 0x03 0x6e 0x03 0x71>;
                clock-names = "pclk\0i2s_pclk\0i2s_aoclk\0i2s_mclk\0i2s_mixer\0spdif_pclk\0spdif_aoclk\0spdif_mclk\0spdif_mclk_sel";
                resets = <0x15 0x06>;
                pinctrl-0 = <0x16>;
                pinctrl-names = "default";
                phandle = <0x45>;
            };

            serial@84c0 {
                compatible = "amlogic,meson-gx-uart";
                reg = <0x00 0x84c0 0x00 0x18>;
                interrupts = <0x00 0x1a 0x01>;
                status = "okay";
                fifo-size = <0x80>;
                clocks = <0x17 0x03 0x1a 0x17>;
                clock-names = "xtal\0pclk\0baud";
                pinctrl-0 = <0x18 0x19>;
                pinctrl-names = "default";
                uart-has-rtscts;
                phandle = <0x57>;

                bluetooth {
                    compatible = "brcm,bcm43438-bt";
                    shutdown-gpios = <0x1a 0x60 0x00>;
                    max-speed = <0x1e8480>;
                    clocks = <0x1b>;
                    clock-names = "lpo";
                };
            };

            serial@84dc {
                compatible = "amlogic,meson-gx-uart";
                reg = <0x00 0x84dc 0x00 0x18>;
                interrupts = <0x00 0x4b 0x01>;
                status = "disabled";
                clocks = <0x17 0x03 0x30 0x17>;
                clock-names = "xtal\0pclk\0baud";
                phandle = <0x58>;
            };

            i2c@8500 {
                compatible = "amlogic,meson-gxbb-i2c";
                reg = <0x00 0x8500 0x00 0x20>;
                interrupts = <0x00 0x15 0x01>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x16>;
                phandle = <0x59>;
            };

            pwm@8550 {
                compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
                reg = <0x00 0x8550 0x00 0x10>;
                #pwm-cells = <0x03>;
                status = "disabled";
                phandle = <0x5a>;
            };

            pwm@8650 {
                compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
                reg = <0x00 0x8650 0x00 0x10>;
                #pwm-cells = <0x03>;
                status = "disabled";
                phandle = <0x5b>;
            };

            adc@8680 {
                compatible = "amlogic,meson-gxm-saradc\0amlogic,meson-saradc";
                reg = <0x00 0x8680 0x00 0x34>;
                #io-channel-cells = <0x01>;
                interrupts = <0x00 0x49 0x01>;
                status = "okay";
                clocks = <0x17 0x03 0x17 0x03 0x61 0x03 0x62>;
                clock-names = "clkin\0core\0adc_clk\0adc_sel";
                vref-supply = <0x1c>;
                phandle = <0x5c>;
            };

            pwm@86c0 {
                compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
                reg = <0x00 0x86c0 0x00 0x10>;
                #pwm-cells = <0x03>;
                status = "okay";
                pinctrl-0 = <0x1d>;
                pinctrl-names = "default";
                clocks = <0x03 0x06>;
                clock-names = "clkin0";
                phandle = <0x41>;
            };

            serial@8700 {
                compatible = "amlogic,meson-gx-uart";
                reg = <0x00 0x8700 0x00 0x18>;
                interrupts = <0x00 0x5d 0x01>;
                status = "disabled";
                clocks = <0x17 0x03 0x44 0x17>;
                clock-names = "xtal\0pclk\0baud";
                phandle = <0x5d>;
            };

            clock-measure@8758 {
                compatible = "amlogic,meson-gx-clk-measure";
                reg = <0x00 0x8758 0x00 0x10>;
            };

            i2c@87c0 {
                compatible = "amlogic,meson-gxbb-i2c";
                reg = <0x00 0x87c0 0x00 0x20>;
                interrupts = <0x00 0xd6 0x01>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x16>;
                phandle = <0x5e>;
            };

            i2c@87e0 {
                compatible = "amlogic,meson-gxbb-i2c";
                reg = <0x00 0x87e0 0x00 0x20>;
                interrupts = <0x00 0xd7 0x01>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x16>;
                phandle = <0x5f>;
            };

            spi@8d80 {
                compatible = "amlogic,meson-gx-spicc";
                reg = <0x00 0x8d80 0x00 0x80>;
                interrupts = <0x00 0x51 0x04>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x15>;
                clock-names = "core";
                resets = <0x15 0xc1>;
                num-cs = <0x01>;
                phandle = <0x60>;
            };

            spi@8c80 {
                compatible = "amlogic,meson-gxbb-spifc";
                reg = <0x00 0x8c80 0x00 0x80>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x22>;
                phandle = <0x61>;
            };

            watchdog@98d0 {
                compatible = "amlogic,meson-gxbb-wdt";
                reg = <0x00 0x98d0 0x00 0x10>;
                clocks = <0x17>;
            };
        };

        interrupt-controller@c4301000 {
            compatible = "arm,gic-400";
            reg = <0x00 0xc4301000 0x00 0x1000 0x00 0xc4302000 0x00 0x2000 0x00 0xc4304000 0x00 0x2000 0x00 0xc4306000 0x00 0x2000>;
            interrupt-controller;
            interrupts = <0x01 0x09 0xff04>;
            #interrupt-cells = <0x03>;
            #address-cells = <0x00>;
            phandle = <0x01>;
        };

        sram@c8000000 {
            compatible = "mmio-sram";
            reg = <0x00 0xc8000000 0x00 0x14000>;
            #address-cells = <0x01>;
            #size-cells = <0x01>;
            ranges = <0x00 0x00 0xc8000000 0x14000>;
            phandle = <0x62>;

            scp-sram@0 {
                compatible = "amlogic,meson-gxbb-scp-shmem";
                reg = <0x13000 0x400>;
                phandle = <0x13>;
            };

            scp-sram@200 {
                compatible = "amlogic,meson-gxbb-scp-shmem";
                reg = <0x13400 0x400>;
                phandle = <0x14>;
            };
        };

        bus@c8100000 {
            compatible = "simple-bus";
            reg = <0x00 0xc8100000 0x00 0x100000>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xc8100000 0x00 0x100000>;
            phandle = <0x63>;

            sys-ctrl@0 {
                compatible = "amlogic,meson-gx-ao-sysctrl\0simple-mfd\0syscon";
                reg = <0x00 0x00 0x00 0x100>;
                phandle = <0x24>;

                clock-controller {
                    compatible = "amlogic,meson-gxm-aoclkc\0amlogic,meson-gx-aoclkc";
                    #clock-cells = <0x01>;
                    #reset-cells = <0x01>;
                    clocks = <0x17 0x03 0x0c>;
                    clock-names = "xtal\0mpeg-clk";
                    phandle = <0x1e>;
                };
            };

            rtc@a8 {
                compatible = "amlogic,meson-vrtc";
                reg = <0x00 0xa8 0x00 0x04>;
                phandle = <0x64>;
            };

            cec@100 {
                compatible = "amlogic,meson-gx-ao-cec";
                reg = <0x00 0x100 0x00 0x14>;
                interrupts = <0x00 0xc7 0x01>;
                status = "okay";
                clocks = <0x1e 0x06>;
                clock-names = "core";
                pinctrl-0 = <0x1f>;
                pinctrl-names = "default";
                hdmi-phandle = <0x20>;
                phandle = <0x65>;
            };

            ao-secure@140 {
                compatible = "amlogic,meson-gx-ao-secure\0syscon";
                reg = <0x00 0x140 0x00 0x140>;
                amlogic,has-chip-id;
                phandle = <0x66>;
            };

            serial@4c0 {
                compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
                reg = <0x00 0x4c0 0x00 0x18>;
                interrupts = <0x00 0xc1 0x01>;
                status = "okay";
                clocks = <0x17 0x1e 0x03 0x17>;
                clock-names = "xtal\0pclk\0baud";
                pinctrl-0 = <0x21>;
                pinctrl-names = "default";
                phandle = <0x67>;
            };

            serial@4e0 {
                compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
                reg = <0x00 0x4e0 0x00 0x18>;
                interrupts = <0x00 0xc5 0x01>;
                status = "disabled";
                clocks = <0x17 0x1e 0x04 0x17>;
                clock-names = "xtal\0pclk\0baud";
                phandle = <0x68>;
            };

            i2c@500 {
                compatible = "amlogic,meson-gxbb-i2c";
                reg = <0x00 0x500 0x00 0x20>;
                interrupts = <0x00 0xc3 0x01>;
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                status = "disabled";
                clocks = <0x03 0x5d>;
                phandle = <0x69>;
            };

            pwm@550 {
                compatible = "amlogic,meson-gx-ao-pwm\0amlogic,meson-gxbb-ao-pwm";
                reg = <0x00 0x550 0x00 0x10>;
                #pwm-cells = <0x03>;
                status = "disabled";
                phandle = <0x6a>;
            };

            ir@580 {
                compatible = "amlogic,meson-gx-ir\0amlogic,meson-gxbb-ir";
                reg = <0x00 0x580 0x00 0x40>;
                interrupts = <0x00 0xc4 0x01>;
                status = "okay";
                pinctrl-0 = <0x22>;
                pinctrl-names = "default";
                linux,rc-map-name = "rc-vega-s9x";
                phandle = <0x6b>;
            };

            pinctrl@14 {
                compatible = "amlogic,meson-gxl-aobus-pinctrl";
                #address-cells = <0x02>;
                #size-cells = <0x02>;
                ranges;
                phandle = <0x23>;

                bank@14 {
                    reg = <0x00 0x14 0x00 0x08 0x00 0x2c 0x00 0x04 0x00 0x24 0x00 0x08>;
                    reg-names = "mux\0pull\0gpio";
                    gpio-controller;
                    #gpio-cells = <0x02>;
                    gpio-ranges = <0x23 0x00 0x00 0x0e>;
                    phandle = <0x6c>;
                };

                uart_ao_a {
                    phandle = <0x21>;

                    mux {
                        groups = "uart_tx_ao_a\0uart_rx_ao_a";
                        function = "uart_ao";
                        bias-disable;
                    };
                };

                uart_ao_a_cts_rts {
                    phandle = <0x6d>;

                    mux {
                        groups = "uart_cts_ao_a\0uart_rts_ao_a";
                        function = "uart_ao";
                        bias-disable;
                    };
                };

                uart_ao_b {
                    phandle = <0x6e>;

                    mux {
                        groups = "uart_tx_ao_b\0uart_rx_ao_b";
                        function = "uart_ao_b";
                        bias-disable;
                    };
                };

                uart_ao_b_0_1 {
                    phandle = <0x6f>;

                    mux {
                        groups = "uart_tx_ao_b_0\0uart_rx_ao_b_1";
                        function = "uart_ao_b";
                        bias-disable;
                    };
                };

                uart_ao_b_cts_rts {
                    phandle = <0x70>;

                    mux {
                        groups = "uart_cts_ao_b\0uart_rts_ao_b";
                        function = "uart_ao_b";
                        bias-disable;
                    };
                };

                remote_input_ao {
                    phandle = <0x22>;

                    mux {
                        groups = "remote_input_ao";
                        function = "remote_input_ao";
                        bias-disable;
                    };
                };

                i2c_ao {
                    phandle = <0x71>;

                    mux {
                        groups = "i2c_sck_ao\0i2c_sda_ao";
                        function = "i2c_ao";
                        bias-disable;
                    };
                };

                pwm_ao_a_3 {
                    phandle = <0x72>;

                    mux {
                        groups = "pwm_ao_a_3";
                        function = "pwm_ao_a";
                        bias-disable;
                    };
                };

                pwm_ao_a_8 {
                    phandle = <0x73>;

                    mux {
                        groups = "pwm_ao_a_8";
                        function = "pwm_ao_a";
                        bias-disable;
                    };
                };

                pwm_ao_b {
                    phandle = <0x74>;

                    mux {
                        groups = "pwm_ao_b";
                        function = "pwm_ao_b";
                        bias-disable;
                    };
                };

                pwm_ao_b_6 {
                    phandle = <0x75>;

                    mux {
                        groups = "pwm_ao_b_6";
                        function = "pwm_ao_b";
                        bias-disable;
                    };
                };

                i2s_out_ch23_ao {
                    phandle = <0x76>;

                    mux {
                        groups = "i2s_out_ch23_ao";
                        function = "i2s_out_ao";
                        bias-disable;
                    };
                };

                i2s_out_ch45_ao {
                    phandle = <0x77>;

                    mux {
                        groups = "i2s_out_ch45_ao";
                        function = "i2s_out_ao";
                        bias-disable;
                    };
                };

                spdif_out_ao_6 {
                    phandle = <0x78>;

                    mux {
                        groups = "spdif_out_ao_6";
                        function = "spdif_out_ao";
                        bias-disable;
                    };
                };

                spdif_out_ao_9 {
                    phandle = <0x79>;

                    mux {
                        groups = "spdif_out_ao_9";
                        function = "spdif_out_ao";
                        bias-disable;
                    };
                };

                ao_cec {
                    phandle = <0x1f>;

                    mux {
                        groups = "ao_cec";
                        function = "cec_ao";
                        bias-disable;
                    };
                };

                ee_cec {
                    phandle = <0x7a>;

                    mux {
                        groups = "ee_cec";
                        function = "cec_ao";
                        bias-disable;
                    };
                };
            };
        };

        video-codec@c8820000 {
            compatible = "amlogic,gxm-vdec\0amlogic,gx-vdec";
            reg = <0x00 0xc8820000 0x00 0x10000 0x00 0xc110a580 0x00 0xe4>;
            reg-names = "dos\0esparser";
            interrupts = <0x00 0x2c 0x01 0x00 0x20 0x01>;
            interrupt-names = "vdec\0esparser";
            amlogic,ao-sysctrl = <0x24>;
            amlogic,canvas = <0x25>;
            clocks = <0x03 0x36 0x03 0x11 0x03 0x99 0x03 0x9c>;
            clock-names = "dos_parser\0dos\0vdec_1\0vdec_hevc";
            resets = <0x15 0x28>;
            reset-names = "esparser";
            phandle = <0x7b>;
        };

        bus@c8834000 {
            compatible = "simple-bus";
            reg = <0x00 0xc8834000 0x00 0x2000>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xc8834000 0x00 0x2000>;
            phandle = <0x7c>;

            rng {
                compatible = "amlogic,meson-rng";
                reg = <0x00 0x00 0x00 0x04>;
                clocks = <0x03 0x19>;
                clock-names = "core";
                phandle = <0x7d>;
            };

            pinctrl@4b0 {
                compatible = "amlogic,meson-gxl-periphs-pinctrl";
                #address-cells = <0x02>;
                #size-cells = <0x02>;
                ranges;
                phandle = <0x26>;

                bank@4b0 {
                    reg = <0x00 0x4b0 0x00 0x28 0x00 0x4e8 0x00 0x14 0x00 0x520 0x00 0x14 0x00 0x430 0x00 0x40>;
                    reg-names = "mux\0pull\0pull-enable\0gpio";
                    gpio-controller;
                    #gpio-cells = <0x02>;
                    gpio-ranges = <0x26 0x00 0x00 0x64>;
                    phandle = <0x1a>;
                };

                emmc {
                    phandle = <0x31>;

                    mux-0 {
                        groups = "emmc_nand_d07\0emmc_cmd";
                        function = "emmc";
                        bias-pull-up;
                    };

                    mux-1 {
                        groups = "emmc_clk";
                        function = "emmc";
                        bias-disable;
                    };
                };

                emmc-ds {
                    phandle = <0x32>;

                    mux {
                        groups = "emmc_ds";
                        function = "emmc";
                        bias-pull-down;
                    };
                };

                emmc_clk_gate {
                    phandle = <0x33>;

                    mux {
                        groups = "BOOT_8";
                        function = "gpio_periphs";
                        bias-pull-down;
                    };
                };

                nor {
                    phandle = <0x7e>;

                    mux {
                        groups = "nor_d\0nor_q\0nor_c\0nor_cs";
                        function = "nor";
                        bias-disable;
                    };
                };

                spi-pins {
                    phandle = <0x7f>;

                    mux {
                        groups = "spi_miso\0spi_mosi\0spi_sclk";
                        function = "spi";
                        bias-disable;
                    };
                };

                spi-ss0 {
                    phandle = <0x80>;

                    mux {
                        groups = "spi_ss0";
                        function = "spi";
                        bias-disable;
                    };
                };

                sdcard {
                    phandle = <0x2f>;

                    mux-0 {
                        groups = "sdcard_d0\0sdcard_d1\0sdcard_d2\0sdcard_d3\0sdcard_cmd";
                        function = "sdcard";
                        bias-pull-up;
                    };

                    mux-1 {
                        groups = "sdcard_clk";
                        function = "sdcard";
                        bias-disable;
                    };
                };

                sdcard_clk_gate {
                    phandle = <0x30>;

                    mux {
                        groups = "CARD_2";
                        function = "gpio_periphs";
                        bias-pull-down;
                    };
                };

                sdio {
                    phandle = <0x2a>;

                    mux-0 {
                        groups = "sdio_d0\0sdio_d1\0sdio_d2\0sdio_d3\0sdio_cmd";
                        function = "sdio";
                        bias-pull-up;
                    };

                    mux-1 {
                        groups = "sdio_clk";
                        function = "sdio";
                        bias-disable;
                    };
                };

                sdio_clk_gate {
                    phandle = <0x2b>;

                    mux {
                        groups = "GPIOX_4";
                        function = "gpio_periphs";
                        bias-pull-down;
                    };
                };

                sdio_irq {
                    phandle = <0x81>;

                    mux {
                        groups = "sdio_irq";
                        function = "sdio";
                        bias-disable;
                    };
                };

                uart_a {
                    phandle = <0x18>;

                    mux {
                        groups = "uart_tx_a\0uart_rx_a";
                        function = "uart_a";
                        bias-disable;
                    };
                };

                uart_a_cts_rts {
                    phandle = <0x19>;

                    mux {
                        groups = "uart_cts_a\0uart_rts_a";
                        function = "uart_a";
                        bias-disable;
                    };
                };

                uart_b {
                    phandle = <0x82>;

                    mux {
                        groups = "uart_tx_b\0uart_rx_b";
                        function = "uart_b";
                        bias-disable;
                    };
                };

                uart_b_cts_rts {
                    phandle = <0x83>;

                    mux {
                        groups = "uart_cts_b\0uart_rts_b";
                        function = "uart_b";
                        bias-disable;
                    };
                };

                uart_c {
                    phandle = <0x84>;

                    mux {
                        groups = "uart_tx_c\0uart_rx_c";
                        function = "uart_c";
                        bias-disable;
                    };
                };

                uart_c_cts_rts {
                    phandle = <0x85>;

                    mux {
                        groups = "uart_cts_c\0uart_rts_c";
                        function = "uart_c";
                        bias-disable;
                    };
                };

                i2c_a {
                    phandle = <0x86>;

                    mux {
                        groups = "i2c_sck_a\0i2c_sda_a";
                        function = "i2c_a";
                        bias-disable;
                    };
                };

                i2c_b {
                    phandle = <0x87>;

                    mux {
                        groups = "i2c_sck_b\0i2c_sda_b";
                        function = "i2c_b";
                        bias-disable;
                    };
                };

                i2c_c {
                    phandle = <0x88>;

                    mux {
                        groups = "i2c_sck_c\0i2c_sda_c";
                        function = "i2c_c";
                        bias-disable;
                    };
                };

                i2c_c_dv18 {
                    phandle = <0x89>;

                    mux {
                        groups = "i2c_sck_c_dv19\0i2c_sda_c_dv18";
                        function = "i2c_c";
                        bias-disable;
                    };
                };

                eth_c {
                    phandle = <0x28>;

                    mux {
                        groups = "eth_mdio\0eth_mdc\0eth_clk_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_rxd2\0eth_rxd3\0eth_rgmii_tx_clk\0eth_tx_en\0eth_txd0\0eth_txd1\0eth_txd2\0eth_txd3";
                        function = "eth";
                        bias-disable;
                    };
                };

                eth_link_led {
                    phandle = <0x8a>;

                    mux {
                        groups = "eth_link_led";
                        function = "eth_led";
                        bias-disable;
                    };
                };

                eth_act_led {
                    phandle = <0x8b>;

                    mux {
                        groups = "eth_act_led";
                        function = "eth_led";
                    };
                };

                pwm_a {
                    phandle = <0x8c>;

                    mux {
                        groups = "pwm_a";
                        function = "pwm_a";
                        bias-disable;
                    };
                };

                pwm_b {
                    phandle = <0x8d>;

                    mux {
                        groups = "pwm_b";
                        function = "pwm_b";
                        bias-disable;
                    };
                };

                pwm_c {
                    phandle = <0x8e>;

                    mux {
                        groups = "pwm_c";
                        function = "pwm_c";
                        bias-disable;
                    };
                };

                pwm_d {
                    phandle = <0x8f>;

                    mux {
                        groups = "pwm_d";
                        function = "pwm_d";
                        bias-disable;
                    };
                };

                pwm_e {
                    phandle = <0x1d>;

                    mux {
                        groups = "pwm_e";
                        function = "pwm_e";
                        bias-disable;
                    };
                };

                pwm_f_clk {
                    phandle = <0x90>;

                    mux {
                        groups = "pwm_f_clk";
                        function = "pwm_f";
                        bias-disable;
                    };
                };

                pwm_f_x {
                    phandle = <0x91>;

                    mux {
                        groups = "pwm_f_x";
                        function = "pwm_f";
                        bias-disable;
                    };
                };

                hdmi_hpd {
                    phandle = <0x39>;

                    mux {
                        groups = "hdmi_hpd";
                        function = "hdmi_hpd";
                        bias-disable;
                    };
                };

                hdmi_i2c {
                    phandle = <0x3a>;

                    mux {
                        groups = "hdmi_sda\0hdmi_scl";
                        function = "hdmi_i2c";
                        bias-disable;
                    };
                };

                i2s_am_clk {
                    phandle = <0x92>;

                    mux {
                        groups = "i2s_am_clk";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2s_out_ao_clk {
                    phandle = <0x93>;

                    mux {
                        groups = "i2s_out_ao_clk";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2s_out_lr_clk {
                    phandle = <0x94>;

                    mux {
                        groups = "i2s_out_lr_clk";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2s_out_ch01 {
                    phandle = <0x95>;

                    mux {
                        groups = "i2s_out_ch01";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2sout_ch23_z {
                    phandle = <0x96>;

                    mux {
                        groups = "i2sout_ch23_z";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2sout_ch45_z {
                    phandle = <0x97>;

                    mux {
                        groups = "i2sout_ch45_z";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                i2sout_ch67_z {
                    phandle = <0x98>;

                    mux {
                        groups = "i2sout_ch67_z";
                        function = "i2s_out";
                        bias-disable;
                    };
                };

                spdif_out_ao_h {
                    phandle = <0x16>;

                    mux {
                        groups = "spdif_out_h";
                        function = "spdif_out";
                        bias-disable;
                    };
                };
            };

            eth-phy-mux {
                compatible = "mdio-mux-mmioreg\0mdio-mux";
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                reg = <0x00 0x55c 0x00 0x04>;
                mux-mask = <0xffffffff>;
                mdio-parent-bus = <0x27>;

                mdio@e40908ff {
                    reg = <0xe40908ff>;
                    #address-cells = <0x01>;
                    #size-cells = <0x00>;
                    phandle = <0x99>;

                    ethernet-phy@8 {
                        compatible = "ethernet-phy-id0181.4400";
                        interrupts = <0x00 0x09 0x04>;
                        reg = <0x08>;
                        max-speed = <0x64>;
                        phandle = <0x9a>;
                    };
                };

                mdio@2009087f {
                    reg = <0x2009087f>;
                    #address-cells = <0x01>;
                    #size-cells = <0x00>;
                    phandle = <0x9b>;

                    ethernet-phy@0 {
                        reg = <0x00>;
                        phandle = <0x29>;
                    };
                };
            };
        };

        bus@c8838000 {
            compatible = "simple-bus";
            reg = <0x00 0xc8838000 0x00 0x400>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xc8838000 0x00 0x400>;
            phandle = <0x9c>;

            video-lut@48 {
                compatible = "amlogic,canvas";
                reg = <0x00 0x48 0x00 0x14>;
                phandle = <0x25>;
            };
        };

        bus@c883c000 {
            compatible = "simple-bus";
            reg = <0x00 0xc883c000 0x00 0x2000>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xc883c000 0x00 0x2000>;
            phandle = <0x9d>;

            system-controller@0 {
                compatible = "amlogic,meson-gx-hhi-sysctrl\0simple-mfd\0syscon";
                reg = <0x00 0x00 0x00 0x400>;
                phandle = <0x9e>;

                power-controller {
                    compatible = "amlogic,meson-gxbb-pwrc";
                    #power-domain-cells = <0x01>;
                    amlogic,ao-sysctrl = <0x24>;
                    resets = <0x15 0x05 0x15 0x0a 0x15 0x0d 0x15 0x25 0x15 0x84 0x15 0x85 0x15 0x86 0x15 0x87 0x15 0x89 0x15 0x8c 0x15 0x8d 0x15 0xe7>;
                    reset-names = "viu\0venc\0vcbus\0bt656\0dvin\0rdma\0venci\0vencp\0vdac\0vdi6\0vencl\0vid_lock";
                    clocks = <0x03 0x84 0x03 0x8c>;
                    clock-names = "vpu\0vapb";
                    assigned-clocks = <0x03 0x7e 0x03 0x80 0x03 0x84 0x03 0x85 0x03 0x87 0x03 0x8b>;
                    assigned-clock-parents = <0x03 0x05 0x00 0x03 0x80 0x03 0x06 0x00 0x03 0x87>;
                    assigned-clock-rates = <0x00 0x27bc86aa 0x00 0x00 0xee6b280 0x00>;
                    phandle = <0x02>;
                };

                clock-controller {
                    compatible = "amlogic,gxl-clkc";
                    #clock-cells = <0x01>;
                    clocks = <0x17>;
                    clock-names = "xtal";
                    phandle = <0x03>;
                };
            };

            mailbox@404 {
                compatible = "amlogic,meson-gxbb-mhu";
                reg = <0x00 0x404 0x00 0x4c>;
                interrupts = <0x00 0xd0 0x01 0x00 0xd1 0x01 0x00 0xd2 0x01>;
                #mbox-cells = <0x01>;
                phandle = <0x12>;
            };
        };

        ethernet@c9410000 {
            compatible = "amlogic,meson-gxbb-dwmac\0snps,dwmac-3.70a\0snps,dwmac";
            reg = <0x00 0xc9410000 0x00 0x10000 0x00 0xc8834540 0x00 0x04>;
            interrupts = <0x00 0x08 0x04>;
            interrupt-names = "macirq";
            rx-fifo-depth = <0x1000>;
            tx-fifo-depth = <0x800>;
            power-domains = <0x02 0x01>;
            status = "okay";
            clocks = <0x03 0x24 0x03 0x04 0x03 0x0f 0x03 0x04>;
            clock-names = "stmmaceth\0clkin0\0clkin1\0timing-adjustment";
            resets = <0x15 0x2b>;
            reset-names = "stmmaceth";
            pinctrl-0 = <0x28>;
            pinctrl-names = "default";
            phy-handle = <0x29>;
            amlogic,tx-delay-ns = <0x02>;
            phy-mode = "rgmii";
            snps,aal;
            snps,txpbl = <0x08>;
            snps,rxpbl = <0x08>;
            phandle = <0x9f>;

            mdio {
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                compatible = "snps,dwmac-mdio";
                phandle = <0x27>;
            };
        };

        apb@d0000000 {
            compatible = "simple-bus";
            reg = <0x00 0xd0000000 0x00 0x200000>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges = <0x00 0x00 0x00 0xd0000000 0x00 0x200000>;
            phandle = <0xa0>;

            mmc@70000 {
                compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
                reg = <0x00 0x70000 0x00 0x800>;
                interrupts = <0x00 0xd8 0x01>;
                status = "okay";
                clocks = <0x03 0x5e 0x03 0x77 0x03 0x04>;
                clock-names = "core\0clkin0\0clkin1";
                resets = <0x15 0x2c>;
                pinctrl-0 = <0x2a>;
                pinctrl-1 = <0x2b>;
                pinctrl-names = "default\0clk-gate";
                #address-cells = <0x01>;
                #size-cells = <0x00>;
                bus-width = <0x04>;
                cap-sd-highspeed;
                sd-uhs-sdr12;
                sd-uhs-sdr25;
                sd-uhs-sdr50;
                sd-uhs-sdr104;
                max-frequency = <0x5f5e100>;
                non-removable;
                disable-wp;
                keep-power-in-suspend;
                mmc-pwrseq = <0x2c>;
                vmmc-supply = <0x2d>;
                vqmmc-supply = <0x2e>;
                phandle = <0xa1>;
            };

            mmc@72000 {
                compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
                reg = <0x00 0x72000 0x00 0x800>;
                interrupts = <0x00 0xd9 0x01>;
                status = "okay";
                clocks = <0x03 0x5f 0x03 0x7a 0x03 0x04>;
                clock-names = "core\0clkin0\0clkin1";
                resets = <0x15 0x2d>;
                pinctrl-0 = <0x2f>;
                pinctrl-1 = <0x30>;
                pinctrl-names = "default\0clk-gate";
                bus-width = <0x04>;
                cap-sd-highspeed;
                max-frequency = <0x2faf080>;
                disable-wp;
                cd-gpios = <0x1a 0x30 0x01>;
                vmmc-supply = <0x2d>;
                vqmmc-supply = <0x2e>;
                phandle = <0xa2>;
            };

            mmc@74000 {
                compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
                reg = <0x00 0x74000 0x00 0x800>;
                interrupts = <0x00 0xda 0x01>;
                status = "okay";
                clocks = <0x03 0x60 0x03 0x7d 0x03 0x04>;
                clock-names = "core\0clkin0\0clkin1";
                resets = <0x15 0x2e>;
                pinctrl-0 = <0x31 0x32>;
                pinctrl-1 = <0x33>;
                pinctrl-names = "default\0clk-gate";
                bus-width = <0x08>;
                cap-mmc-highspeed;
                max-frequency = <0xbebc200>;
                non-removable;
                disable-wp;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
                mmc-pwrseq = <0x34>;
                vmmc-supply = <0x35>;
                vqmmc-supply = <0x2e>;
                phandle = <0xa3>;
            };

            phy@78000 {
                compatible = "amlogic,meson-gxl-usb2-phy";
                #phy-cells = <0x00>;
                reg = <0x00 0x78000 0x00 0x20>;
                clocks = <0x03 0x37>;
                clock-names = "phy";
                resets = <0x15 0x22>;
                reset-names = "phy";
                status = "okay";
                phandle = <0x3e>;
            };

            phy@78020 {
                compatible = "amlogic,meson-gxl-usb2-phy";
                #phy-cells = <0x00>;
                reg = <0x00 0x78020 0x00 0x20>;
                clocks = <0x03 0x37>;
                clock-names = "phy";
                resets = <0x15 0x22>;
                reset-names = "phy";
                status = "okay";
                phandle = <0x3f>;
            };

            phy@78040 {
                compatible = "amlogic,meson-gxl-usb2-phy";
                #phy-cells = <0x00>;
                reg = <0x00 0x78040 0x00 0x20>;
                clocks = <0x03 0x37>;
                clock-names = "phy";
                resets = <0x15 0x22>;
                reset-names = "phy";
                status = "okay";
                phandle = <0x40>;
            };

            gpu@c0000 {
                compatible = "amlogic,meson-gxm-mali\0arm,mali-t820";
                reg = <0x00 0xc0000 0x00 0x40000>;
                interrupt-parent = <0x01>;
                interrupts = <0x00 0xa2 0x04 0x00 0xa1 0x04 0x00 0xa0 0x04>;
                interrupt-names = "job\0mmu\0gpu";
                clocks = <0x03 0x6a>;
                resets = <0x15 0x14 0x15 0x4e>;
                operating-points-v2 = <0x36>;
                phandle = <0xa4>;
            };
        };

        vpu@d0100000 {
            compatible = "amlogic,meson-gxm-vpu\0amlogic,meson-gx-vpu";
            reg = <0x00 0xd0100000 0x00 0x100000 0x00 0xc883c000 0x00 0x1000>;
            reg-names = "vpu\0hhi";
            interrupts = <0x00 0x03 0x01>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            amlogic,canvas = <0x25>;
            power-domains = <0x02 0x00>;
            phandle = <0xa5>;

            port@0 {
                reg = <0x00>;
                phandle = <0xa6>;

                endpoint {
                    remote-endpoint = <0x37>;
                    phandle = <0x42>;
                };
            };

            port@1 {
                reg = <0x01>;
                phandle = <0xa7>;

                endpoint {
                    remote-endpoint = <0x38>;
                    phandle = <0x3c>;
                };
            };
        };

        hdmi-tx@c883a000 {
            compatible = "amlogic,meson-gxm-dw-hdmi\0amlogic,meson-gx-dw-hdmi";
            reg = <0x00 0xc883a000 0x00 0x1c>;
            interrupts = <0x00 0x39 0x01>;
            #address-cells = <0x01>;
            #size-cells = <0x00>;
            #sound-dai-cells = <0x00>;
            sound-name-prefix = "HDMITX";
            status = "okay";
            resets = <0x15 0x13 0x15 0x4f 0x15 0x42>;
            reset-names = "hdmitx_apb\0hdmitx\0hdmitx_phy";
            clocks = <0x03 0x3f 0x03 0x0c 0x03 0x4d>;
            clock-names = "isfr\0iahb\0venci";
            pinctrl-0 = <0x39 0x3a>;
            pinctrl-names = "default";
            hdmi-supply = <0x3b>;
            phandle = <0x20>;

            port@0 {
                reg = <0x00>;
                phandle = <0xa8>;

                endpoint {
                    remote-endpoint = <0x3c>;
                    phandle = <0x38>;
                };
            };

            port@1 {
                reg = <0x01>;
                phandle = <0xa9>;

                endpoint {
                    remote-endpoint = <0x3d>;
                    phandle = <0x43>;
                };
            };
        };

        usb@d0078080 {
            compatible = "amlogic,meson-gxm-usb-ctrl";
            reg = <0x00 0xd0078080 0x00 0x20>;
            interrupts = <0x00 0x10 0x04>;
            #address-cells = <0x02>;
            #size-cells = <0x02>;
            ranges;
            clocks = <0x03 0x37 0x03 0x40>;
            clock-names = "usb_ctrl\0ddr";
            resets = <0x15 0x22>;
            dr_mode = "host";
            phys = <0x3e 0x3f 0x40>;
            phy-names = "usb2-phy0\0usb2-phy1\0usb2-phy2";
            status = "okay";
            phandle = <0xaa>;

            usb@c9100000 {
                compatible = "amlogic,meson-g12a-usb\0snps,dwc2";
                reg = <0x00 0xc9100000 0x00 0x40000>;
                interrupts = <0x00 0x1f 0x04>;
                clocks = <0x03 0x33>;
                clock-names = "otg";
                phys = <0x3f>;
                dr_mode = "peripheral";
                g-rx-fifo-size = <0xc0>;
                g-np-tx-fifo-size = <0x80>;
                g-tx-fifo-size = <0x80 0x80 0x10 0x10 0x10>;
                phandle = <0xab>;
            };

            usb@c9000000 {
                compatible = "snps,dwc3";
                reg = <0x00 0xc9000000 0x00 0x100000>;
                interrupts = <0x00 0x1e 0x04>;
                dr_mode = "host";
                maximum-speed = "high-speed";
                snps,dis_u2_susphy_quirk;
                phandle = <0xac>;
            };
        };

        audio-controller@c8832000 {
            compatible = "amlogic,t9015";
            reg = <0x00 0xc8832000 0x00 0x14>;
            #sound-dai-cells = <0x00>;
            sound-name-prefix = "ACODEC";
            clocks = <0x03 0xce>;
            clock-names = "pclk";
            resets = <0x15 0x3d>;
            status = "okay";
            AVDD-supply = <0x1c>;
            phandle = <0x47>;
        };

        crypto@c883e000 {
            compatible = "amlogic,gxl-crypto";
            reg = <0x00 0xc883e000 0x00 0x36>;
            interrupts = <0x00 0xbc 0x01 0x00 0xbd 0x01>;
            clocks = <0x03 0x2e>;
            clock-names = "blkmv";
            status = "okay";
            phandle = <0xad>;
        };
    };

    opp-table {
        compatible = "operating-points-v2";
        phandle = <0x36>;

        opp-125000000 {
            opp-hz = <0x00 0x7735940>;
            opp-microvolt = <0xe7ef0>;
        };

        opp-250000000 {
            opp-hz = <0x00 0xee6b280>;
            opp-microvolt = <0xe7ef0>;
        };

        opp-285714285 {
            opp-hz = <0x00 0x1107a76d>;
            opp-microvolt = <0xe7ef0>;
        };

        opp-400000000 {
            opp-hz = <0x00 0x17d78400>;
            opp-microvolt = <0xe7ef0>;
        };

        opp-500000000 {
            opp-hz = <0x00 0x1dcd6500>;
            opp-microvolt = <0xe7ef0>;
        };

        opp-666666666 {
            opp-hz = <0x00 0x27bc86aa>;
            opp-microvolt = <0xe7ef0>;
        };
    };

    analog-amplifier {
        compatible = "simple-audio-amplifier";
        sound-name-prefix = "AU2";
        VCC-supply = <0x3b>;
        enable-gpios = <0x1a 0x15 0x00>;
        phandle = <0x44>;
    };

    audio-codec-0 {
        #sound-dai-cells = <0x00>;
        compatible = "linux,spdif-dit";
        status = "okay";
        sound-name-prefix = "DIT";
        phandle = <0x46>;
    };

    memory@0 {
        device_type = "memory";
        reg = <0x00 0x00 0x00 0x80000000>;
    };

    regulator-hdmi-5v {
        compatible = "regulator-fixed";
        regulator-name = "HDMI_5V";
        regulator-min-microvolt = <0x4c4b40>;
        regulator-max-microvolt = <0x4c4b40>;
        gpio = <0x1a 0x13 0x00>;
        enable-active-high;
        regulator-always-on;
        phandle = <0x3b>;
    };

    regulator-vddio_ao18 {
        compatible = "regulator-fixed";
        regulator-name = "VDDIO_AO18";
        regulator-min-microvolt = <0x1b7740>;
        regulator-max-microvolt = <0x1b7740>;
        phandle = <0x1c>;
    };

    regulator-vddio_boot {
        compatible = "regulator-fixed";
        regulator-name = "VDDIO_BOOT";
        regulator-min-microvolt = <0x1b7740>;
        regulator-max-microvolt = <0x1b7740>;
        phandle = <0x2e>;
    };

    regulator-vddao_3v3 {
        compatible = "regulator-fixed";
        regulator-name = "VDDAO_3V3";
        regulator-min-microvolt = <0x325aa0>;
        regulator-max-microvolt = <0x325aa0>;
        phandle = <0x2d>;
    };

    regulator-vcc_3v3 {
        compatible = "regulator-fixed";
        regulator-name = "VCC_3V3";
        regulator-min-microvolt = <0x325aa0>;
        regulator-max-microvolt = <0x325aa0>;
        phandle = <0x35>;
    };

    emmc-pwrseq {
        compatible = "mmc-pwrseq-emmc";
        reset-gpios = <0x1a 0x23 0x01>;
        phandle = <0x34>;
    };

    wifi32k {
        compatible = "pwm-clock";
        #clock-cells = <0x00>;
        clock-frequency = <0x8000>;
        pwms = <0x41 0x00 0x7736 0x00>;
        phandle = <0x1b>;
    };

    sdio-pwrseq {
        compatible = "mmc-pwrseq-simple";
        reset-gpios = <0x1a 0x55 0x01>;
        clocks = <0x1b>;
        clock-names = "ext_clock";
        phandle = <0x2c>;
    };

    cvbs-connector {
        compatible = "composite-video-connector";

        port {

            endpoint {
                remote-endpoint = <0x42>;
                phandle = <0x37>;
            };
        };
    };

    hdmi-connector {
        compatible = "hdmi-connector";
        type = [61 00];

        port {

            endpoint {
                remote-endpoint = <0x43>;
                phandle = <0x3d>;
            };
        };
    };

    sound {
        compatible = "amlogic,gx-sound-card";
        model = "P230-Q200";
        audio-aux-devs = <0x44>;
        audio-widgets = "Line\0Lineout";
        audio-routing = "AU2 INL\0ACODEC LOLP\0AU2 INR\0ACODEC LORP\0AU2 INL\0ACODEC LOLN\0AU2 INR\0ACODEC LORN\0Lineout\0AU2 OUTL\0Lineout\0AU2 OUTR";
        assigned-clocks = <0x03 0x0d 0x03 0x0e 0x03 0x0f>;
        assigned-clock-parents = <0x00 0x00 0x00>;
        assigned-clock-rates = <0x11940000 0x10266000 0x17700000>;
        status = "okay";

        dai-link-0 {
            sound-dai = <0x45 0x00 0x00>;
        };

        dai-link-1 {
            sound-dai = <0x45 0x00 0x01>;
        };

        dai-link-2 {
            sound-dai = <0x45 0x00 0x02>;
            dai-format = "i2s";
            mclk-fs = <0x100>;

            codec-0 {
                sound-dai = <0x45 0x01 0x00>;
            };

            codec-1 {
                sound-dai = <0x45 0x02 0x00>;
            };
        };

        dai-link-3 {
            sound-dai = <0x45 0x00 0x03>;

            codec-0 {
                sound-dai = <0x46>;
            };
        };

        dai-link-4 {
            sound-dai = <0x45 0x01 0x02>;

            codec-0 {
                sound-dai = <0x20>;
            };
        };

        dai-link-5 {
            sound-dai = <0x45 0x02 0x02>;

            codec-0 {
                sound-dai = <0x47>;
            };
        };
    };

    openvfd {
        compatible = "open,vfd";
        dev_name = "openvfd";
        status = "okay";
    };

    __symbols__ {
        hwrom_reserved = "/reserved-memory/hwrom@0";
        secmon_reserved = "/reserved-memory/secmon@10000000";
        secmon_reserved_alt = "/reserved-memory/secmon@5000000";
        secmon_reserved_bl32 = "/reserved-memory/secmon@5300000";
        simplefb_cvbs = "/chosen/framebuffer-cvbs";
        simplefb_hdmi = "/chosen/framebuffer-hdmi";
        cpu0 = "/cpus/cpu@0";
        cpu1 = "/cpus/cpu@1";
        cpu2 = "/cpus/cpu@2";
        cpu3 = "/cpus/cpu@3";
        l2 = "/cpus/l2-cache0";
        cpu4 = "/cpus/cpu@100";
        cpu5 = "/cpus/cpu@101";
        cpu6 = "/cpus/cpu@102";
        cpu7 = "/cpus/cpu@103";
        cpu_passive = "/thermal-zones/cpu-thermal/trips/cpu-passive";
        cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu-hot";
        cpu_critical = "/thermal-zones/cpu-thermal/trips/cpu-critical";
        cpu_cooling_maps = "/thermal-zones/cpu-thermal/cooling-maps";
        xtal = "/xtal-clk";
        sm = "/firmware/secure-monitor";
        efuse = "/efuse";
        sn = "/efuse/sn@14";
        eth_mac = "/efuse/eth_mac@34";
        bid = "/efuse/bid@46";
        scpi_clocks = "/scpi/clocks";
        scpi_dvfs = "/scpi/clocks/scpi_clocks@0";
        scpi_sensors = "/scpi/sensors";
        cbus = "/soc/bus@c1100000";
        gpio_intc = "/soc/bus@c1100000/interrupt-controller@9880";
        reset = "/soc/bus@c1100000/reset-controller@4404";
        aiu = "/soc/bus@c1100000/audio-controller@5400";
        uart_A = "/soc/bus@c1100000/serial@84c0";
        uart_B = "/soc/bus@c1100000/serial@84dc";
        i2c_A = "/soc/bus@c1100000/i2c@8500";
        pwm_ab = "/soc/bus@c1100000/pwm@8550";
        pwm_cd = "/soc/bus@c1100000/pwm@8650";
        saradc = "/soc/bus@c1100000/adc@8680";
        pwm_ef = "/soc/bus@c1100000/pwm@86c0";
        uart_C = "/soc/bus@c1100000/serial@8700";
        i2c_B = "/soc/bus@c1100000/i2c@87c0";
        i2c_C = "/soc/bus@c1100000/i2c@87e0";
        spicc = "/soc/bus@c1100000/spi@8d80";
        spifc = "/soc/bus@c1100000/spi@8c80";
        gic = "/soc/interrupt-controller@c4301000";
        sram = "/soc/sram@c8000000";
        cpu_scp_lpri = "/soc/sram@c8000000/scp-sram@0";
        cpu_scp_hpri = "/soc/sram@c8000000/scp-sram@200";
        aobus = "/soc/bus@c8100000";
        sysctrl_AO = "/soc/bus@c8100000/sys-ctrl@0";
        clkc_AO = "/soc/bus@c8100000/sys-ctrl@0/clock-controller";
        vrtc = "/soc/bus@c8100000/rtc@a8";
        cec_AO = "/soc/bus@c8100000/cec@100";
        sec_AO = "/soc/bus@c8100000/ao-secure@140";
        uart_AO = "/soc/bus@c8100000/serial@4c0";
        uart_AO_B = "/soc/bus@c8100000/serial@4e0";
        i2c_AO = "/soc/bus@c8100000/i2c@500";
        pwm_AO_ab = "/soc/bus@c8100000/pwm@550";
        ir = "/soc/bus@c8100000/ir@580";
        pinctrl_aobus = "/soc/bus@c8100000/pinctrl@14";
        gpio_ao = "/soc/bus@c8100000/pinctrl@14/bank@14";
        uart_ao_a_pins = "/soc/bus@c8100000/pinctrl@14/uart_ao_a";
        uart_ao_a_cts_rts_pins = "/soc/bus@c8100000/pinctrl@14/uart_ao_a_cts_rts";
        uart_ao_b_pins = "/soc/bus@c8100000/pinctrl@14/uart_ao_b";
        uart_ao_b_0_1_pins = "/soc/bus@c8100000/pinctrl@14/uart_ao_b_0_1";
        uart_ao_b_cts_rts_pins = "/soc/bus@c8100000/pinctrl@14/uart_ao_b_cts_rts";
        remote_input_ao_pins = "/soc/bus@c8100000/pinctrl@14/remote_input_ao";
        i2c_ao_pins = "/soc/bus@c8100000/pinctrl@14/i2c_ao";
        pwm_ao_a_3_pins = "/soc/bus@c8100000/pinctrl@14/pwm_ao_a_3";
        pwm_ao_a_8_pins = "/soc/bus@c8100000/pinctrl@14/pwm_ao_a_8";
        pwm_ao_b_pins = "/soc/bus@c8100000/pinctrl@14/pwm_ao_b";
        pwm_ao_b_6_pins = "/soc/bus@c8100000/pinctrl@14/pwm_ao_b_6";
        i2s_out_ch23_ao_pins = "/soc/bus@c8100000/pinctrl@14/i2s_out_ch23_ao";
        i2s_out_ch45_ao_pins = "/soc/bus@c8100000/pinctrl@14/i2s_out_ch45_ao";
        spdif_out_ao_6_pins = "/soc/bus@c8100000/pinctrl@14/spdif_out_ao_6";
        spdif_out_ao_9_pins = "/soc/bus@c8100000/pinctrl@14/spdif_out_ao_9";
        ao_cec_pins = "/soc/bus@c8100000/pinctrl@14/ao_cec";
        ee_cec_pins = "/soc/bus@c8100000/pinctrl@14/ee_cec";
        vdec = "/soc/video-codec@c8820000";
        periphs = "/soc/bus@c8834000";
        hwrng = "/soc/bus@c8834000/rng";
        pinctrl_periphs = "/soc/bus@c8834000/pinctrl@4b0";
        gpio = "/soc/bus@c8834000/pinctrl@4b0/bank@4b0";
        emmc_pins = "/soc/bus@c8834000/pinctrl@4b0/emmc";
        emmc_ds_pins = "/soc/bus@c8834000/pinctrl@4b0/emmc-ds";
        emmc_clk_gate_pins = "/soc/bus@c8834000/pinctrl@4b0/emmc_clk_gate";
        nor_pins = "/soc/bus@c8834000/pinctrl@4b0/nor";
        spi_pins = "/soc/bus@c8834000/pinctrl@4b0/spi-pins";
        spi_ss0_pins = "/soc/bus@c8834000/pinctrl@4b0/spi-ss0";
        sdcard_pins = "/soc/bus@c8834000/pinctrl@4b0/sdcard";
        sdcard_clk_gate_pins = "/soc/bus@c8834000/pinctrl@4b0/sdcard_clk_gate";
        sdio_pins = "/soc/bus@c8834000/pinctrl@4b0/sdio";
        sdio_clk_gate_pins = "/soc/bus@c8834000/pinctrl@4b0/sdio_clk_gate";
        sdio_irq_pins = "/soc/bus@c8834000/pinctrl@4b0/sdio_irq";
        uart_a_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_a";
        uart_a_cts_rts_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_a_cts_rts";
        uart_b_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_b";
        uart_b_cts_rts_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_b_cts_rts";
        uart_c_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_c";
        uart_c_cts_rts_pins = "/soc/bus@c8834000/pinctrl@4b0/uart_c_cts_rts";
        i2c_a_pins = "/soc/bus@c8834000/pinctrl@4b0/i2c_a";
        i2c_b_pins = "/soc/bus@c8834000/pinctrl@4b0/i2c_b";
        i2c_c_pins = "/soc/bus@c8834000/pinctrl@4b0/i2c_c";
        i2c_c_dv18_pins = "/soc/bus@c8834000/pinctrl@4b0/i2c_c_dv18";
        eth_pins = "/soc/bus@c8834000/pinctrl@4b0/eth_c";
        eth_link_led_pins = "/soc/bus@c8834000/pinctrl@4b0/eth_link_led";
        eth_act_led_pins = "/soc/bus@c8834000/pinctrl@4b0/eth_act_led";
        pwm_a_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_a";
        pwm_b_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_b";
        pwm_c_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_c";
        pwm_d_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_d";
        pwm_e_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_e";
        pwm_f_clk_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_f_clk";
        pwm_f_x_pins = "/soc/bus@c8834000/pinctrl@4b0/pwm_f_x";
        hdmi_hpd_pins = "/soc/bus@c8834000/pinctrl@4b0/hdmi_hpd";
        hdmi_i2c_pins = "/soc/bus@c8834000/pinctrl@4b0/hdmi_i2c";
        i2s_am_clk_pins = "/soc/bus@c8834000/pinctrl@4b0/i2s_am_clk";
        i2s_out_ao_clk_pins = "/soc/bus@c8834000/pinctrl@4b0/i2s_out_ao_clk";
        i2s_out_lr_clk_pins = "/soc/bus@c8834000/pinctrl@4b0/i2s_out_lr_clk";
        i2s_out_ch01_pins = "/soc/bus@c8834000/pinctrl@4b0/i2s_out_ch01";
        i2sout_ch23_z_pins = "/soc/bus@c8834000/pinctrl@4b0/i2sout_ch23_z";
        i2sout_ch45_z_pins = "/soc/bus@c8834000/pinctrl@4b0/i2sout_ch45_z";
        i2sout_ch67_z_pins = "/soc/bus@c8834000/pinctrl@4b0/i2sout_ch67_z";
        spdif_out_h_pins = "/soc/bus@c8834000/pinctrl@4b0/spdif_out_ao_h";
        internal_mdio = "/soc/bus@c8834000/eth-phy-mux/mdio@e40908ff";
        internal_phy = "/soc/bus@c8834000/eth-phy-mux/mdio@e40908ff/ethernet-phy@8";
        external_mdio = "/soc/bus@c8834000/eth-phy-mux/mdio@2009087f";
        external_phy = "/soc/bus@c8834000/eth-phy-mux/mdio@2009087f/ethernet-phy@0";
        dmcbus = "/soc/bus@c8838000";
        canvas = "/soc/bus@c8838000/video-lut@48";
        hiubus = "/soc/bus@c883c000";
        sysctrl = "/soc/bus@c883c000/system-controller@0";
        pwrc = "/soc/bus@c883c000/system-controller@0/power-controller";
        clkc = "/soc/bus@c883c000/system-controller@0/clock-controller";
        mailbox = "/soc/bus@c883c000/mailbox@404";
        ethmac = "/soc/ethernet@c9410000";
        mdio0 = "/soc/ethernet@c9410000/mdio";
        apb = "/soc/apb@d0000000";
        sd_emmc_a = "/soc/apb@d0000000/mmc@70000";
        sd_emmc_b = "/soc/apb@d0000000/mmc@72000";
        sd_emmc_c = "/soc/apb@d0000000/mmc@74000";
        usb2_phy0 = "/soc/apb@d0000000/phy@78000";
        usb2_phy1 = "/soc/apb@d0000000/phy@78020";
        usb2_phy2 = "/soc/apb@d0000000/phy@78040";
        mali = "/soc/apb@d0000000/gpu@c0000";
        vpu = "/soc/vpu@d0100000";
        cvbs_vdac_port = "/soc/vpu@d0100000/port@0";
        cvbs_vdac_out = "/soc/vpu@d0100000/port@0/endpoint";
        hdmi_tx_port = "/soc/vpu@d0100000/port@1";
        hdmi_tx_out = "/soc/vpu@d0100000/port@1/endpoint";
        hdmi_tx = "/soc/hdmi-tx@c883a000";
        hdmi_tx_venc_port = "/soc/hdmi-tx@c883a000/port@0";
        hdmi_tx_in = "/soc/hdmi-tx@c883a000/port@0/endpoint";
        hdmi_tx_tmds_port = "/soc/hdmi-tx@c883a000/port@1";
        hdmi_tx_tmds_out = "/soc/hdmi-tx@c883a000/port@1/endpoint";
        usb = "/soc/usb@d0078080";
        dwc2 = "/soc/usb@d0078080/usb@c9100000";
        dwc3 = "/soc/usb@d0078080/usb@c9000000";
        acodec = "/soc/audio-controller@c8832000";
        crypto = "/soc/crypto@c883e000";
        gpu_opp_table = "/opp-table";
        dio2133 = "/analog-amplifier";
        spdif_dit = "/audio-codec-0";
        hdmi_5v = "/regulator-hdmi-5v";
        vddio_ao18 = "/regulator-vddio_ao18";
        vddio_boot = "/regulator-vddio_boot";
        vddao_3v3 = "/regulator-vddao_3v3";
        vcc_3v3 = "/regulator-vcc_3v3";
        emmc_pwrseq = "/emmc-pwrseq";
        wifi32k = "/wifi32k";
        sdio_pwrseq = "/sdio-pwrseq";
        cvbs_connector_in = "/cvbs-connector/port/endpoint";
        hdmi_connector_in = "/hdmi-connector/port/endpoint";
    };
};
d5stick commented 1 year ago

DTS with new value updated to DTB, booted and it is running. I'll monitor the situation if the freezes stop. If so the DTB can be updated in your repository.

ophub commented 1 year ago

The dts file sent to you above is the source file of the kernel. Which dtb you use can be found and modified in the repo.

d5stick commented 1 year ago

I decompiled and recompiled the "meson-gxm-x92" dtb file from: "/boot/dtb/amlogic" on the device itself using this methode:

EXAMPLE!!
------------------------------------------------------------------------
CONVERT dtb to dts
------------------------------------------------------------------------
dtc -I dtb -O dts /boot/dtb/allwinner/sun50i-a64-sopine-baseboard.dtb -o /boot/dtb/allwinner/sun50i-a64-sopine-baseboard.dts

------------------------------------------------------------------------
EDIT dts
------------------------------------------------------------------------
nano /boot/dtb/allwinner/sun50i-a64-sopine-baseboard.dts

------------------------------------------------------------------------
CONVERT (BACK) dts to dtb
------------------------------------------------------------------------            
dtc -I dts -O dtb /boot/dtb/allwinner/sun50i-a64-sopine-baseboard.dts -o /boot/dtb/allwinner/sun50i-a64-sopine-baseboard.dtb

reboot
EXAMPLE!!
d5stick commented 1 year ago

Same crash, i'll grab another box, think this box is broken. You can close this. Thanks!

serrj-sv commented 1 year ago

I have a X96 Max Plus2 AI box (S905X3, AM7256, IP1001M) whith exactly same symptoms: the same kernel panic crash on all kernels. Also ethernet works only if I force it to 100mbps. What is strange though: latest Coreelec build works rock solid.

d5stick commented 1 year ago

Could be something within Armbian 23.02. I'll check if i got an older image somewhere to verify if that runs.

ophub commented 1 year ago

Sometimes the latest kernel has a panic problem in a certain version of the kernel, but not all 4 series of kernels will appear at the same time. For example, 5.4/5.10 has no longer added new support. It is only fixing the bugs found. They are very stable. up.

d5stick commented 1 year ago

Hi Ophub,

Yesterday i installed Armbian 22.0.8-trunk Jammy and updated the kernel to 6.1.8-flippy-81+. Did the same configuration as i did with the 23 version. Updated your scripts manually to update the Armbian build. No crashes what so ever. Even the EMMC is running at 200.

There is something in the 23 build causing these crashes.

ophub commented 1 year ago

Okay, congratulations, you have found a solution to the problem, please continue to save this version 22.0.8 for a while for future use.

d5stick commented 1 year ago

Thank you for the help, really appreciated.

d5stick commented 1 year ago

afbeelding